PIC18C858-E/L Microchip Technology, PIC18C858-E/L Datasheet - Page 166

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PIC18C858-E/L

Manufacturer Part Number
PIC18C858-E/L
Description
IC MCU OTP 16KX16 CAN 84PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr

Specifications of PIC18C858-E/L

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
84-PLCC
For Use With
AC164310 - MODULE SKT FOR PM3 84PLCCDVA18XL840 - ADAPTER DEVICE ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC18C858E/L

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18C858-E/L
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18CXX8
15.4.16.3 Bus Collision During a STOP Condition
Bus collision occurs during a STOP condition if:
a)
b)
FIGURE 15-26: BUS COLLISION DURING A STOP CONDITION (CASE 1)
FIGURE 15-27: BUS COLLISION DURING A STOP CONDITION (CASE 2)
DS30475A-page 166
After the SDA pin has been de-asserted and
allowed to float high, SDA is sampled low after
the BRG has timed out.
After the SCL pin is de-asserted, SCL is sam-
pled low before SDA goes high.
SDA
SCL
PEN
BCLIF
P
SSPIF
SSPIF
BCLIF
PEN
SDA
SCL
P
Assert SDA
T
SDA asserted low
BRG
T
BRG
Advanced Information
T
BRG
T
BRG
The STOP condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allowed to
float. When the pin is sampled high (clock arbitration),
the baud rate generator is loaded with SSPADD<6:0>
and counts down to 0. After the BRG times out, SDA is
sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data ’0’ (Figure 15-26). If the SCL pin is sampled
low before SDA is allowed to float high, a bus collision
occurs. This is another case of another master attempt-
ing to drive a data ’0’ (Figure 15-27).
SCL goes low before SDA goes high,
set BCLIF
T
BRG
T
BRG
 2000 Microchip Technology Inc.
’0’
’0’
SDA sampled
low after T
set BCLIF
’0’
’0’
BRG
,

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