PIC18C858-E/L Microchip Technology, PIC18C858-E/L Datasheet - Page 68

• Manufacturer Part Number: PIC18C858-E/L
• Description: IC MCU OTP 16KX16 CAN 84PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C858-E/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 84-PLCC
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCDVA18XL840 - ADAPTER DEVICE ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC18C858E/L

PIC18CXX8
5.2
5.2.1
The TBLRD instructions are used to read data from pro-
gram memory to data memory.
TBLPTR points to a byte address in program space.
Executing TBLRD places the byte pointed to into
TABLAT. In addition, TBLPTR can be modified auto-
matically for the next Table Read operation.
Table Reads from program memory are performed one
byte at a time. The instruction will load TABLAT with the
one byte from program memory pointed to by TBLPTR.
5.2.2
The program memory of PIC18CXX8 devices is written
in blocks. For PIC18CXX8 devices, the write block size
is 2 bytes. Consequently, Table Write operations to
program memory are performed in pairs, one byte at a
time.
FIGURE 5-3:
EXAMPLE 5-1:
DS30475A-page 68
; Read a byte from location 0x0020
CLRF
CLRF
MOVLW 0x20
MOVWF TBLPTRL
MOVWF TBLRD*
n + 1
n + 2
n - 1
Program Memory
n
Program Memory Read/Writes
TABLE READ OVERVIEW (TBLRD)
PROGRAM MEMORY WRITE BLOCK SIZE
TBLPTRU
TBLPTRH
DataHigh
DataLow
HOLDING REGISTER AND THE WRITE
TABLE READ CODE EXAMPLE
; Load upper 5 bits of
; 0x0020
; Load higher 8 bits of
; 0x0020
; Load 0x20 into
; TBLPTRL
; Data is in TABLAT
DataHigh
MSB
MSB
Holding Register
Advanced Information
DataLow
DataLow
LSB
LSB
When a Table Write occurs to an even program mem-
ory address (TBLPTR<0> = 0), the contents of TABLAT
are transferred to an internal holding register. This is
performed as a short write and the program memory
block is not actually programmed at this time. The
holding register is not accessible by the user.
When a Table Write occurs to an odd program memory
address (TBLPTR<0> = 1), a long write is started. Dur-
ing the long write, the contents of TABLAT are written
to the high byte of the program memory block and the
contents of the holding register are transferred to the
low byte of the program memory block.
Figure 5-3 shows the holding register and the program
memory write blocks.
If a single byte is to be programmed, the low (even)
byte of the destination program word should be read
using TBLRD*, modified or changed, if required, and
written back to the same address using TBLWT*+. The
high (odd) byte should be read using TBLRD*, modified
or changed if required, and written back to the same
address using TBLWT. The write to an odd address will
cause a long write to begin. This process ensures that
existing data in either byte will not be changed unless
desired.
Instruction Execution
; TABLPTR points to address n
MOVLW DataLow
MOVWF TABLAT
TBLWT*+
MOVLW DataHigh
MOVWF TABLAT
TBLWT*
 2000 Microchip Technology Inc.
; Load low data
; byte to TABLAT
; Write it to LSB
; of Holding register
; Load high data
; byte to TABLAT
; Write it to MSB
; of Holding
; register and
; begin long
; write