PIC18C858-E/L Microchip Technology, PIC18C858-E/L Datasheet - Page 124

• Manufacturer Part Number: PIC18C858-E/L
• Description: IC MCU OTP 16KX16 CAN 84PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C858-E/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 84-PLCC
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCDVA18XL840 - ADAPTER DEVICE ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC18C858E/L

PIC18CXX8
13.1
Timer3 can operate in one of these modes:
• As a timer
• As a synchronous counter
• As an asynchronous counter
The operating mode is determined by the clock select
bit, TMR3CS (T3CON register).
FIGURE 13-1: TIMER3 BLOCK DIAGRAM
FIGURE 13-2: TIMER3 BLOCK DIAGRAM CONFIGURED IN 16-BIT READ/WRITE MODE
DS30475A-page 124
TMR3IF Overflow
Interrupt Flag
bit
Note 1:
Note 1:
T1OSO/
T13CKI
T1OSI
Timer3 Operation
Data Bus<7:0>
Write TMR3L
Read TMR3L
T1OSO/
T13CKI
T1OSI
When the T1OSCEN bit is cleared, the inverter and feedback resistor are turned off. This eliminates power drain.
When enable bit T1OSCEN is cleared, the inverter and feedback resistor are turned off. This eliminates power drain.
TMR3IF
Overflow
Interrupt
Flag bit
T1OSC
8
TMR3H
TMR3H
8
To Timer1 Clock Input
TMR3H
T1OSC
Enable
Oscillator
T1OSCEN
8
TMR3
(1)
8
TMR3L
Oscillator
Enable
T1OSCEN
Advanced Information
TMR3L
CLR
(1)
CLR
Internal
Clock
Fosc/4
Clock
F
Internal
TMR3ON
OSC
on/off
TMR3CS
/4
TMR3ON
When TMR3CS = 0, Timer3 increments every instruc-
tion cycle. When TMR3CS = 1, Timer3 increments on
every rising edge of the Timer1 external clock input or
the Timer1 oscillator, if enabled.
When the Timer1 oscillator is enabled (T1OSCEN is
set), the RC1/T1OSI and RC0/T1OSO/T1CKI pins
become inputs. That is, the TRISC<1:0> value is
ignored.
Timer3 also has an internal “RESET input”. This
RESET can be generated by the CCP module
(Section 13.0).
On/Off
1
0
TMR3CS
T3CCPx
CCP Special Trigger
1
0
T3CCPx
T3CKPS1:T3CKPS0
CCP Special Trigger
T3SYNC
T3CKPS1:T3CKPS0
Prescaler
1, 2, 4, 8
T3SYNC
0
1
Prescaler
1, 2, 4, 8
2
0
1
2
 2000 Microchip Technology Inc.
Synchronized
Clock Input
Synchronize
SLEEP Input
Synchronized
Clock Input
Synchronize
SLEEP Input
det
det