PIC18C858-E/L Microchip Technology, PIC18C858-E/L Datasheet - Page 153

• Manufacturer Part Number: PIC18C858-E/L
• Description: IC MCU OTP 16KX16 CAN 84PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C858-E/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 84-PLCC
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCDVA18XL840 - ADAPTER DEVICE ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC18C858E/L

15.4.5
In I
located in the lower 7 bits of the SSPADD register
(Figure 15-11). When the BRG is loaded with this
value, the BRG counts down to 0 and stops until
another reload has taken place. The BRG count is dec-
FIGURE 15-11: BAUD RATE GENERATOR BLOCK DIAGRAM
FIGURE 15-12: BAUD RATE GENERATOR TIMING WITH CLOCK ARBITRATION
 2000 Microchip Technology Inc.
2
C Master mode, the reload value for the BRG is
BAUD RATE GENERATOR
SDA
SCL
BRG
value
BRG
reload
SSPM3:SSPM0
03h
SCL
DX
SCL de-asserted but slave holds
SCL low (clock arbitration)
02h
SSPM3:SSPM0
SCL is sampled high, reload takes
place and BRG starts its count.
Advanced Information
Control
Reload
01h
CLKOUT
BRG decrements on
Q2 and Q4 cycles
00h (hold off)
Reload
DX-1
remented twice per instruction cycle (T
and Q4 clocks. In I
reloaded automatically. If Clock Arbitration is taking
place, for instance, the BRG will be reloaded when the
SCL pin is sampled high (Figure 15-12).
BRG Down Counter
SSPADD<6:0>
SCL allowed to transition high
03h
2
C Master mode, the BRG is
PIC18CXX8
Fosc/4
02h
DS30475A-page 153
CY
) on the Q2