PIC18C858-E/L Microchip Technology, PIC18C858-E/L Datasheet - Page 279

• Manufacturer Part Number: PIC18C858-E/L
• Description: IC MCU OTP 16KX16 CAN 84PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C858-E/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 84-PLCC
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCDVA18XL840 - ADAPTER DEVICE ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC18C858E/L

CPFSGT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Example:
2000 Microchip Technology Inc.
Before Instruction
operation
operation
operation
Decode
No
No
No
PC
WREG
After Instruction
If REG
If REG
Q1
Q1
Q1
PC
PC
register ’f’
operation
operation
operation
Compare f with WREG,
skip if f > WREG
[ label ] CPFSGT
0
a
(f)
skip if (f) > (WREG)
(unsigned comparison)
None
Compares the contents of data
memory location ’f’ to the contents
of the WREG by performing an
unsigned subtraction.
If the contents of ’f’ are greater than
the contents of
instruction is discarded and a NOP
is executed instead making this a
two-cycle instruction. If ’a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ’a’ is 1, the
Bank will be selected as per the
BSR value.
1
1(2)
Note:3 cycles if skip and followed
HERE
NGREATER
GREATER
Read
0110
No
No
No
Q2
Q2
Q2
=
=
>
=
f
=
[0,1]
WREG),
by a 2-word instruction.
255
Address (HERE)
?
WREG;
Address (GREATER)
WREG;
Address (NGREATER)
010a
operation
operation
operation
CPFSGT REG
:
:
Process
Data
No
No
No
Q3
Q3
Q3
,
then the fetched
ffff
f [,a]
Advanced Information
operation
operation
operation
operation
No
No
No
No
Q4
Q4
Q4
ffff
CPFSLT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Example:
Before Instruction
After Instruction
operation
operation
operation
Decode
PC
WREG
If REG
PC
If REG
PC
No
No
No
Q1
Q1
Q1
register ’f’
operation
operation
operation
Compare f with WREG,
skip if f < WREG
[ label ] CPFSLT
0
a
(f) – WREG),
skip if (f) < (WREG)
(unsigned comparison)
None
Compares the contents of data
memory location 'f' to the contents
of W by performing an unsigned
subtraction.
If the contents of 'f' are less than
the contents of WREG, then the
fetched instruction is discarded and
a NOP is executed instead making
this a two-cycle instruction. If ’a’ is
0, the Access Bank will be
selected. If ’a’ is 1, the Bank will be
selected as per the BSR value.
1
1(2)
Note: 3 cycles if skip and followed
HERE
NLESS
LESS
Read
0110
No
No
No
Q2
Q2
Q2
=
=
<
=
f
=
[0,1]
PIC18CXX8
by a 2-word instruction.
255
Address (HERE)
?
WREG;
Address (LESS)
WREG;
Address (NLESS)
CPFSLT REG
:
:
000a
operation
operation
operation
Process
Data
No
No
No
Q3
Q3
Q3
DS30475A-page 279
ffff
f [,a]
operation
operation
operation
operation
No
No
No
No
Q4
Q4
Q4
ffff