PIC18C858-E/L Microchip Technology, PIC18C858-E/L Datasheet - Page 169
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18C858-E/L
Manufacturer Part Number
PIC18C858-E/L
Description
IC MCU OTP 16KX16 CAN 84PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C858-E/L
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
84-PLCC
For Use With
AC164310 - MODULE SKT FOR PM3 84PLCCDVA18XL840 - ADAPTER DEVICE ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC18C858E/L
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C858-E/L
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 169 of 366
- Download datasheet (7Mb)
16.1
The BRG supports both the Asynchronous and Syn-
chronous modes of the USART. It is a dedicated 8-bit
baud rate generator. The SPBRG register controls the
period of a free running 8-bit timer. In Asynchronous
mode, bit BRGH (TXSTA register) also controls the
baud rate. In Synchronous mode, bit BRGH is ignored.
Table 16-1 shows the formula for computation of the
baud rate for different USART modes, which only apply
in Master mode (internal clock).
Given the desired baud rate and F
integer value for the SPBRG register can be calculated
using the formula in Table 16-1. From this, the error in
baud rate can be determined.
Example 16-1 shows the calculation of the baud rate
error for the following conditions:
EXAMPLE 16-1: CALCULATING BAUD RATE ERROR
TABLE 16-1:
TABLE 16-2:
2000 Microchip Technology Inc.
Desired Baud Rate
Solving for X:
Calculated Baud Rate
Error
Legend: X = value in SPBRG (0 to 255)
Name
TXSTA
RCSTA
SPBRG
Legend: x = unknown, - = unimplemented, read as '0'. Shaded cells are not used by the BRG.
SYNC
0
1
F
Desired Baud Rate = 9600
BRGH = 0
SYNC = 0
OSC
USART Baud Rate Generator (BRG)
X
X
X
Baud Rate Generator Register
= 16 MHz
CSRC
SPEN
Bit 7
BAUD RATE FORMULA
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
(Asynchronous) Baud Rate = F
(Synchronous) Baud Rate = F
Bit 6
TX9
RX9
=
=
=
=
=
=
=
=
=
BRGH = 0 (Low Speed)
SREN
TXEN
Bit 5
F
( (F
((16000000 / 9600) / 64) - 1
[25.042] = 25
16000000 / (64 (25 + 1))
9615
(Calculated Baud Rate - Desired Baud Rate)
(9615 - 9600) / 9600
0.16%
OSC
OSC
OSC
/ (64 (X + 1))
, the nearest
SYNC
CREN
/ Desired Baud Rate) / 64 ) - 1
Bit 4
Advanced Information
Desired Baud Rate
ADDEN
Bit 3
OSC
OSC
—
/(64(X+1))
/(4(X+1))
BRGH
FERR
Bit 2
It may be advantageous to use the high baud rate
(BRGH = 1), even for slower baud clocks. This is
because the F
baud rate error in some cases.
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures the
BRG does not wait for a timer overflow before output-
ting the new baud rate.
16.1.1
The data on the RC7/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin.
TRMT
OERR
Bit 1
SAMPLING
OSC
RX9D
TX9D
Bit 0
/(16(X + 1)) equation can reduce the
Baud Rate = F
BRGH = 1 (High Speed)
0000 -010
0000 000x
0000 0000
PIC18CXX8
Value on
POR,
BOR
NA
OSC
DS30475A-page 169
/(16(X+1))
Value on all
0000 -010
0000 000x
0000 0000
RESETS
other
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