PIC18C858-E/L Microchip Technology, PIC18C858-E/L Datasheet - Page 336

• Manufacturer Part Number: PIC18C858-E/L
• Description: IC MCU OTP 16KX16 CAN 84PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C858-E/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 84-PLCC
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCDVA18XL840 - ADAPTER DEVICE ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC18C858E/L

PIC18CXX8
FIGURE 25-19: MASTER SSP I
TABLE 25-18: MASTER SSP I
DS30475A-page 336
Param.
No.
100
101
102
103
90
91
106
107
92
109
110
D102
Note 1: Maximum pin capacitance = 10 pF for all I
2: A fast mode I
Symbol
T
T
T
T
T
T
T
T
T
T
T
Cb
then be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal.
If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line.
Before the SCL line is released, parameter #102+ parameter #107 = 1000 + 250 = 1250 ns (for 100 kHz mode).
SU
SU
SU
AA
R
HIGH
LOW
F
HD
HD
BUF
:
:
:
:
:
STA
DAT
STO
SDA
Out
STA
DAT
SDA
In
SCL
Note: Refer to Figure 25-4 for load conditions.
Characteristic
Clock high time
Clock low time
SDA and SCL
rise time
SDA and SCL
fall time
START condition
setup time
START condition
hold time
Data input
hold time
Data input
setup time
STOP condition
setup time
Output valid from
clock
Bus free time
Bus capacitive loading
2
C bus device can be used in a standard mode I
90
103
91
2
2
109
C BUS DATA TIMING
C BUS DATA REQUIREMENTS
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
Advanced Information
100
2
106
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
C pins.
Min
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
101
109
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
20 + 0.1Cb
20 + 0.1Cb
TBD
TBD
TBD
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
250
100
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
4.7
1.3
—
—
—
—
—
—
—
—
0
0
107
2
C bus system, but parameter #107
Max
1000
3500
1000
300
300
300
300
100
0.9
400
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Units
92
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
2000 Microchip Technology Inc.
102
110
Conditions
Cb is specified to be from
10 to 400 pF
Cb is specified to be from
10 to 400 pF
Only relevant for
Repeated START
condition
After this period the first
clock pulse is generated
(Note 2)
Time the bus must be free
before a new transmis-
sion can start
250 ns must