PIC18C858-E/L Microchip Technology, PIC18C858-E/L Datasheet - Page 84

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PIC18C858-E/L

Manufacturer Part Number
PIC18C858-E/L
Description
IC MCU OTP 16KX16 CAN 84PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr

Specifications of PIC18C858-E/L

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
84-PLCC
For Use With
AC164310 - MODULE SKT FOR PM3 84PLCCDVA18XL840 - ADAPTER DEVICE ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC18C858E/L

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18C858-E/L
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18CXX8
REGISTER 7-6:
DS30475A-page 84
PIE1
PIE2
PIE3
PIE1
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PIE REGISTERS
bit 7
bit 7
bit 7
PSPIE: Parallel Slave Port Read/Write Interrupt Enable bit
1 = Enables the PSP read/write interrupt
0 = Disables the PSP read/write interrupt
ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D interrupt
0 = Disables the A/D interrupt
RCIE: USART Receive Interrupt Enable bit
1 = Enables the USART receive interrupt
0 = Disables the USART receive interrupt
TXIE: USART Transmit Interrupt Enable bit
1 = Enables the USART transmit interrupt
0 = Disables the USART transmit interrupt
SSPIE: Master Synchronous Serial Port Interrupt Enable bit
1 = Enables the MSSP interrupt
0 = Disables the MSSP interrupt
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
PSPIE
R/W-0
R/W-1
IVRE
U-0
WAKIE
R/W-0
R/W-0
R/W-1
CMIE
ADIE
Advanced Information
R/W-0
ERRIE
R/W-1
RCIE
U-0
TXB2IE
R/W-0
R/W-1
TXIE
U-0
TXB1IE
SSPIE
R/W-0
R/W-0
BCLIE
R/W-1
CCP1IE
TXB0IE
R/W-0
R/W-0
LVDIE
R/W-1
 2000 Microchip Technology Inc.
RXB1IE
TMR2IE
TMR3IE
R/W-1
R/W-0
R/W-0
TMR1IE
CCP2IE
RXB0IE
R/W-0
R/W-0
R/W-1
bit 0
bit 0
bit 0

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