PIC18C858-E/L Microchip Technology, PIC18C858-E/L Datasheet - Page 26

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PIC18C858-E/L

Manufacturer Part Number
PIC18C858-E/L
Description
IC MCU OTP 16KX16 CAN 84PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr

Specifications of PIC18C858-E/L

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
84-PLCC
For Use With
AC164310 - MODULE SKT FOR PM3 84PLCCDVA18XL840 - ADAPTER DEVICE ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC18C858E/L

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18C858-E/L
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18CXX8
2.6.2
The PIC18CXX8 devices contain circuitry to prevent
"glitches" when switching between oscillator sources.
Essentially, the circuitry waits for eight rising edges of
the clock source that the processor is switching to.
This ensures that the new clock source is stable and
that its pulse width will not be less than the shortest
pulse width of the two clock sources.
A timing diagram indicating the transition from the
main oscillator to the Timer1 oscillator is shown in
Figure 2-7. The Timer1 oscillator is assumed to be
running all the time. After the SCS bit is set, the pro-
cessor is frozen at the next occurring Q1 cycle. After
eight synchronization cycles are counted from the
Timer1 oscillator, operation resumes. No additional
delays are required after the synchronization cycles.
FIGURE 2-7:
FIGURE 2-8:
DS30475A-page 26
Program Counter
Note 1:
Internal System
(OSCCON<0>)
T1OSI
OSC1
Internal
System
Clock
SCS
(OSCCON<0>)
Program
Counter
Note 1:
OSCILLATOR TRANSITIONS
T1OSI
OSC1
OSC2
Clock
SCS
T
Q1
OST
Delay on internal system clock is eight oscillator cycles for synchronization.
T
Q2
OSC
= 1024T
PC
Q3
TIMING DIAGRAM FOR TRANSITION FROM OSC1 TO TIMER1 OSCILLATOR
Q3
TIMING DIAGRAM FOR TRANSITION BETWEEN TIMER1 AND OSC1 (HS,XT,LP)
PC
Q4
OSC
Q4
Q1
T
(drawing not to scale).
DLY
1
Q1
2
T
T
1
P
3
Advanced Information
T
OST
4
Tscs
PC + 2
5
T
OSC
6
PC + 2
7
The sequence of events that takes place when switch-
ing from the Timer1 oscillator to the main oscillator will
depend on the mode of the main oscillator. In addition
to eight clock cycles of the main oscillator, additional
delays may take place.
If the main oscillator is configured for an external crys-
tal (HS, XT, LP), the transition will take place after an
oscillator start-up time (T
diagram indicating the transition from the Timer1 oscil-
lator to the main oscillator for HS, XT and LP modes is
shown in Figure 2-8.
1
8
2
Q1
3
Q2
4
T
T
T
SCS
1
Q3
P
5
6
Q4
 2000 Microchip Technology Inc.
7
OST
Q1
Q1
8
) has occurred. A timing
Q2 Q3
Q2
PC + 4
Q3
Q4
Q1 Q2
Q4
PC + 4
Q1
Q3

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