PIC18C858-E/L Microchip Technology, PIC18C858-E/L Datasheet - Page 29

• Manufacturer Part Number: PIC18C858-E/L
• Description: IC MCU OTP 16KX16 CAN 84PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C858-E/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 84-PLCC
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCDVA18XL840 - ADAPTER DEVICE ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC18C858E/L

3.0
The PIC18CXX8 differentiates between various kinds
of RESET:
a)
b)
c)
d)
e)
f)
g)
h)
Most registers are unaffected by a RESET. Their status
is unknown on POR and unchanged by all other
RESETs. The other registers are forced to a “RESET”
FIGURE 3-1:
 2000 Microchip Technology Inc.
MCLR
OSC1
V
Power-on Reset (POR)
MCLR Reset during normal operation
MCLR Reset during SLEEP
Watchdog Timer (WDT) Reset (during normal
operation)
Programmable Brown-out Reset (PBOR)
RESET Instruction
Stack Full Reset
Stack Underflow Reset
Note 1:
DD
Instruction
RESET
RESET
2:
Pointer
RC OSC
Stack
On-chip
OST/PWRT
This is a separate oscillator from the RC oscillator of the CLKI pin.
See Table 3-1 for time-out situations.
Brown-out
V
Module
Detect
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
DD
WDT
Reset
(1)
Rise
Stack Full/Underflow Reset
OST
PWRT
WDT
Time-out
Reset
10-bit Ripple Counter
External Reset
10-bit Ripple Counter
BOREN
Power-on Reset
SLEEP
Advanced Information
Enable PWRT
Enable OST
state on Power-on Reset, MCLR, WDT Reset,
Brown-out Reset, MCLR Reset during SLEEP and by
the RESET instruction.
Most registers are not affected by a WDT wake-up,
since this is viewed as the resumption of normal oper-
ation. Status bits from the RCON register, RI, TO, PD,
POR and BOR are set or cleared differently in different
RESET situations, as indicated in Table 3-2. These bits
are used in software to determine the nature of the
RESET. See Table 3-3 for a full description of the
RESET states of all registers.
A simplified block diagram of the on-chip RESET circuit
is shown in Figure 3-1.
The Enhanced MCU devices have a MCLR noise filter
in the MCLR Reset path. The filter will detect and
ignore small pulses.
A WDT Reset does not drive MCLR pin low.
(2)
PIC18CXX8
S
R
DS30475A-page 29
Q
Chip_Reset