PIC18C858-E/L Microchip Technology, PIC18C858-E/L Datasheet - Page 278

• Manufacturer Part Number: PIC18C858-E/L
• Description: IC MCU OTP 16KX16 CAN 84PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C858-E/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 84-PLCC
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCDVA18XL840 - ADAPTER DEVICE ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC18C858E/L

PIC18CXX8
COMF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
DS30475A-page 278
Before Instruction
After Instruction
Decode
REG
N
Z
REG
WREG
N
Z
Q1
=
=
=
=
=
=
=
register ’f’
Complement f
[ label ] COMF
0
d
a
N,Z
The contents of register ’f’ are com-
plemented. If ’d’ is 0 the result is
stored in W. If ’d’ is 1 the result is
stored back in register ’f’ (default).
If ’a’ is 0, the Access Bank will be
selected, overriding the BSR value.
If ’a’ is 1, the Bank will be selected
as per the BSR value.
1
1
COMF
( f )
Read
0001
Q2
0x13
?
?
0x13
0xEC
1
0
f
[0,1]
[0,1]
255
dest
REG
11da
Process
Data
Q3
f [ ,d [,a] ]
ffff
Advanced Information
destination
Write to
Q4
ffff
CPFSEQ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Example:
Before Instruction
operation
operation
operation
Decode
PC Address
WREG
REG
After Instruction
If REG
If REG
No
No
No
Q1
Q1
Q1
PC
PC
register ’f’
operation
operation
operation
Compare f with WREG,
skip if f = WREG
[ label ] CPFSEQ
0
a
(f) – (WREG),
skip if (f) = (WREG)
(unsigned comparison)
None
Compares the contents of data
memory location 'f' to the contents
of W by performing an unsigned
subtraction.
If 'f' = WREG
instruction is discarded and an NOP
is executed instead making this a
two-cycle instruction. If ’a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ’a’ is 1, the
Bank will be selected as per the
BSR value.
1
1(2)
Note: 3 cycles if skip and followed
HERE
NEQUAL
EQUAL
Read
0110
No
No
No
Q2
Q2
Q2
=
=
=
=
=
=
f
[0,1]
by a 2-word instruction.
2000 Microchip Technology Inc.
255
HERE
?
?
WREG;
Address (EQUAL)
WREG;
Address (NEQUAL)
CPFSEQ REG
:
:
001a
operation
operation
operation
Process
,
Data
then the fetched
No
No
No
Q3
Q3
Q3
ffff
f [,a]
operation
operation
operation
operation
No
Q4
No
No
No
Q4
Q4
ffff