PIC18C858-E/L Microchip Technology, PIC18C858-E/L Datasheet - Page 216

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PIC18C858-E/L

Manufacturer Part Number
PIC18C858-E/L
Description
IC MCU OTP 16KX16 CAN 84PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr

Specifications of PIC18C858-E/L

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
84-PLCC
For Use With
AC164310 - MODULE SKT FOR PM3 84PLCCDVA18XL840 - ADAPTER DEVICE ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC18C858E/L

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18C858-E/L
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18CXX8
17.6
The Message Acceptance Filters and Masks are used
to determine if a message in the message assembly
buffer should be loaded into either of the receive buff-
ers. Once a valid message has been received into the
MAB, the identifier fields of the message are compared
to the filter values. If there is a match, that message will
be loaded into the appropriate receive buffer. The filter
masks are used to determine which bits in the identifier
are examined with the filters. A truth table is shown
below in Table 17-2 that indicates how each bit in the
identifier is compared to the masks and filters to deter-
mine if a the message should be loaded into a receive
buffer. The mask essentially determines which bits to
apply the acceptance filters to. If any mask bit is set to
a zero, then that bit will automatically be accepted,
regardless of the filter bit.
TABLE 17-2:
As shown in the Receive Buffers Block Diagram
(Figure 17-3), acceptance filters RXF0 and RXF1, and
filter mask RXM0 are associated with RXB0. Filters
RXF2, RXF3, RXF4, and RXF5 and mask RXM1 are
associated with RXB1. When a filter matches and a
message is loaded into the receive buffer, the filter
number that enabled the message reception is loaded
into the FILHIT bit(s). For RXB1, the RXB1CON regis-
ter contains the FILHIT<2:0> bits. They are coded as
follows:
• 101 = Acceptance Filter 5 (RXF5)
• 100 = Acceptance Filter 4 (RXF4)
• 011 = Acceptance Filter 3 (RXF3)
• 010 = Acceptance Filter 2 (RXF2)
• 001 = Acceptance Filter 1 (RXF1)
• 000 = Acceptance Filter 0 (RXF0)
DS30475A-page 216
Legend: X = don’t care
Note:
Mask
bit n
0
1
1
1
1
Message Acceptance Filters and
Masks
000 and 001 can only occur if the
RXB0DBEN bit is set in the RXB0CON
register, allowing RXB0 messages to roll
over into RXB1.
Filter bit n
X
0
0
1
1
FILTER/MASK TRUTH TABLE
Message
Identifier
bit n001
X
0
1
0
1
Accept or
Advanced Information
Accept
Accept
Accept
Reject
Reject
Reject
bit n
The coding of the RXB0DBEN bit enables these three
bits to be used similarly to the FILHIT bits and to distin-
guish a hit on filter RXF0 and RXF1, in either RXB0, or
after a roll over into RXB1.
• 111 = Acceptance Filter 1 (RXF1)
• 110 = Acceptance Filter 0 (RXF0)
• 001 = Acceptance Filter 1 (RXF1)
• 000 = Acceptance Filter 0
If the RXB0DBEN bit is clear, there are six codes cor-
responding to the six filters. If the RXB0DBEN bit is set,
there are six codes corresponding to the six filters, plus
two additional codes corresponding to RXF0 and RXF1
filters that roll over into RXB1.
If more than one acceptance filter matches, the FILHIT
bits will encode the binary value of the lowest num-
bered filter that matched. In other words, if filter RXF2
and filter RXF4 match, FILHIT will be loaded with the
value for RXF2. This essentially prioritizes the accep-
tance filters with a lower number filter having higher pri-
ority. Messages are compared to filters in ascending
order of filter number.
The mask and filter registers can only be modified
when the PIC18CXX8 is in Configuration mode. The
mask and filter registers cannot be read outside of Con-
figuration mode. When outside of Configuration mode,
all mask and filter registers will be read as ‘0’.
2000 Microchip Technology Inc.

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