S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 85

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
2.3.18
Freescale Semiconductor
Function
Address 0x0240
Read: Anytime. The data source depends on the data direction value.
Write: Anytime.
DDRK
Altern.
7-6, 4
Field
Field
7,5-0
Reset
PTT
W
R
Port K Data Direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
Port T general purpose input/output data—Data Register, TIM output, routed PWM output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
(PWM7)
• The TIM output function takes precedence over the routed PWM and the general purpose I/O function if the
• The routed PWM function takes precedence over the general purpose I/O function if the related channel is
PTT7
IOC7
Port T Data Register (PTT)
related channel is enabled.
enabled.
—
0
7
(PWM6)
PTT6
IOC6
—
0
6
Table 2-15. DDRK Register Field Descriptions
Table 2-16. PTT Register Field Descriptions
Figure 2-16. Port T Data Register (PTT)
S12XS Family Reference Manual, Rev. 1.11
VREG_API
(PWM5)
PTT5
IOC5
0
5
(PWM4)
PTT4
IOC4
—
0
4
Description
Description
PTT3
IOC3
—
—
3
0
PTT2
IOC2
—
—
0
Port Integration Module (S12XSPIMV1)
2
Access: User read/write
PTT1
IOC1
—
—
0
1
PTT0
IOC0
—
—
0
0
85
1