S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 100

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
1
Port Integration Module (S12XSPIMV1)
2.3.38
2.3.39
100
Address 0x0254
Address 0x0255
Read: Anytime.
Write: Anytime.
Read: Anytime.
Write: Anytime.
PERM
PPSM
Field
Field
Reset
Reset
7-0
7-0
W
W
R
R
Port M pull device enable—Enable pull device on input pin or wired-or output pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
only effect if used in wired-or mode. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
Port M pull device select—Configure pull device polarity on input pin
This bit selects a pull-up or a pull-down device if enabled on the associated port input pin.
If CAN0 is active the selection of a pull-down device on the RXCAN input will have no effect.
1 A pull-down device selected
0 A pull-up device selected
PERM7
PPSM7
Port M Pull Device Enable Register (PERM)
Port M Polarity Select Register (PPSM)
0
0
7
7
PERM6
PPSM6
Figure 2-36. Port M Pull Device Enable Register (PERM)
0
0
6
6
Figure 2-37. Port M Polarity Select Register (PPSM)
Table 2-34. PERM Register Field Descriptions
Table 2-35. PPSM Register Field Descriptions
S12XS Family Reference Manual, Rev. 1.11
PERM5
PPSM5
0
0
5
5
PERM4
PPSM4
0
0
4
4
Description
Description
PERM3
PPSM3
3
0
3
0
PERM2
PPSM2
0
0
2
2
Freescale Semiconductor
PERM1
PPSM1
Access: User read/write
Access: User read/write
0
0
1
1
PERM0
PPSM0
0
0
0
0
1
1