S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 134

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Memory Mapping Control (S12XMMCV4)
3.3.2.3
Read: Anytime
Write: anytime in special modes, one time only in other modes.
This register determines the position of the 256B direct page within the memory map.It is valid for both
global and local mapping scheme.
Bits [22:16] of the global address will be formed by the GPAGE[6:0] bits in case the CPU executes a global
instruction in direct addressing mode or by the appropriate local address to the global address expansion
(refer to
134
Address: 0x0011
DP[15:8]
Reset
Field
7–0
W
R
Section 3.4.2.1.1, “Expansion of the Local Address
MOVB
LDY
DP15
Direct Page Index Bits 15–8 — These bits are used by the CPU when performing accesses using the direct
addressing mode. The bits from this register form bits [15:8] of the address (see
Direct Page Register (DIRECT)
Example 3-2. This example demonstrates usage of the Direct Addressing Mode
0
7
Bit22
#0x80,DIRECT
<00
DP14
0
6
S12XS Family Reference Manual, Rev. 1.11
Figure 3-9. DIRECT Address Mapping
Table 3-5. DIRECT Field Descriptions
Figure 3-8. Direct Register (DIRECT)
Bit16
DP13
Global Address [22:0]
0
5
;Set DIRECT register to 0x80. Write once only.
;Global data accesses to the range 0xXX_80XX can be direct.
;Logical data accesses to the range 0x80XX are direct.
;Load the Y index register from 0x8000 (direct access).
;< operator forces direct access on some assemblers but in
;many cases assemblers are “direct page aware” and can
;automatically select direct mode.
Bit15
DP12
DP [15:8]
0
4
Description
CPU Address [15:0]
Bit8
DP11
Map).
0
3
Bit7
DP10
0
2
Figure
Freescale Semiconductor
Bit0
DP9
3-9).
0
1
DP8
0
0