S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 197

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.3.2
This section consists of the S12XDBG control and trace buffer register descriptions in address order. Each
comparator has a bank of registers that are visible through an 8-byte window between 0x0028 and 0x002F
in the S12XDBG module register address map. When ARM is set in DBGC1, the only bits in the
S12XDBG module registers that can be written are ARM, TRIG, and COMRV[1:0]
Freescale Semiconductor
1
2
Address
0x0028
0x0028
0x002A
0x002B
0x002C
0x002D
0x002E
0x0024
0x0025
0x0026
0x0027
0x0027
0x0029
0x002F
This represents the contents if the Comparator A or C control register is blended into this address.
This represents the contents if the Comparator B or D control register is blended into this address
1
2
(COMPB/D)
(COMPA/C)
DBGXDHM
DBGSCRX
DBGXDLM
DBGXCTL
DBGXCTL
DBGMFR
DBGXAM
DBGXDH
DBGTBH
DBGCNT
DBGXAH
DBGTBL
DBGXAL
DBGXDL
Register Descriptions
Name
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit 15
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
SZE
Figure 6-2. Quick Reference to S12XDBG Registers
0
0
0
0
0
S12XS Family Reference Manual, Rev. 1.11
Bit 14
Bit 22
NDB
Bit 6
SZ
14
14
14
6
0
0
6
6
6
Bit 13
Bit 5
TAG
TAG
21
13
13
13
5
0
0
5
5
5
Bit 12
Bit 4
BRK
BRK
20
12
12
12
4
0
0
4
4
4
Bit 11
CNT
MC3
Bit 3
SC3
RW
RW
19
11
11
11
3
3
3
3
Bit 10
RWE
RWE
S12X Debug (S12XDBGV3) Module
MC2
Bit 2
SC2
18
10
10
10
2
2
2
2
reserved
reserved
MC1
Bit 9
Bit 1
SC1
17
1
9
1
9
1
9
1
COMPE
COMPE
Bit 16
Bit 0
MC0
Bit 8
Bit 0
SC0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
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