S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 549

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Upon clearing CCIF to launch the Set User Margin Level command, the Memory Controller will set the
user margin level for the targeted block and then set the CCIF flag.
Valid margin level settings for the Set User Margin Level command are defined in
18.4.2.13 Set Field Margin Level Command
The Set Field Margin Level command, valid in special modes only, causes the Memory Controller to set
the margin level specified for future read operations of a specific P-Flash or D-Flash block.
Freescale Semiconductor
Register
FSTAT
User margin levels can be used to check that Flash memory contents have
adequate margin for normal level read operations. If unexpected results are
encountered when checking Flash memory contents at user margin levels, a
potential loss of information has been detected.
CCOBIX[2:0]
Table 18-56. Set Field Margin Level Command FCCOB Requirements
000
001
MGSTAT1
MGSTAT0
ACCERR
Table 18-55. Set User Margin Level Command Error Handling
Error Bit
FPVIOL
1
2
(CCOBIX=001)
Table 18-54. Valid Set User Margin Level Settings
Read margin to the erased state
Read margin to the programmed state
0x0000
0x0001
0x0002
CCOB
S12XS Family Reference Manual, Rev. 1.11
Set if CCOBIX[2:0] != 001 at command launch
Set if command not available in current mode (see
Set if an invalid global address [22:16] is supplied
Set if an invalid margin level setting is supplied
None
None
None
0x0E
NOTE
Return to Normal Level
FCCOB Parameters
User Margin-1 Level
User Margin-0 Level
Margin level setting
Level Description
Global address [22:16] to identify the Flash
Error Condition
1
2
256 KByte Flash Module (S12XFTMR256K1V1)
block
Table
18-28)
Table
18-54.
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