DS26514G Maxim Integrated, DS26514G Datasheet - Page 278

• Manufacturer Part Number: DS26514G
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26514G

• Part # Aliases: 90-26514-G00

11.4 E1 Transmitter Functional Timing Diagrams
Figure 11-24. E1 Transmit-Side Timing
Figure 11-25. E1 Transmit-Side Boundary Timing (Elastic Store Disabled)
19-5856; Rev 4; 5/11
TSSYNCIOn
TSYNCn
TSYNCn
TSYNCn
TSYNCn
TCHCLKn
TCHBLKn
FRAME#
TCLKn
TSERn
NOTE 1: TSYNCn IN FRAME MODE (TIOCR.0 = 0).
NOTE 2: TSYNCn IN MULTIFRAME MODE (TIOCR.0 = 1).
NOTE 3: THIS DIAGRAM ASSUMES BOTH THE CAS MF AND THE CRC-4 MF BEGIN WITH THE TAF FRAME.
TSIGn
NOTE 1: TSYNCn IN THE OUTPUT MODE (TIOCR.2 = 1).
NOTE 2: TSYNCn IN THE INPUT MODE (TIOCR.2 = 0).
NOTE 3: TCHBLKn IS PROGRAMMED TO BLOCK CHANNEL 2.
NOTE 4: THE SIGNALING DATA AT TSIGn DURING CHANNEL 1 IS NORMALLY OVERWRITTEN IN THE TRANSMIT
FORMATTER WITH THE CAS MF ALIGNMENT NIBBLE (0000).
NOTE 5: SHOWN IS A TNAF FRAME BOUNDARY.
1
2
1
2
3
14 15 16
LSB
D
Si
1
1
2
A
3
Sa4 Sa5 Sa6 Sa7 Sa8
CHANNEL 1
4
CHANNEL 1
5
6
7
8
9 10
MSB
11 12
13 14 15 16 1
CHANNEL 2
CHANNEL 2
A
DS26514 4-Port T1/E1/J1 Transceiver
B
2
C
3
LSB MSB
4
D
5
6
7
8
9 10
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