DS26514G Maxim Integrated, DS26514G Datasheet - Page 164

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DS26514G

Manufacturer Part Number
DS26514G
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS26514G

Part # Aliases
90-26514-G00

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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: This register has an alternate definition for E1 mode. See E1RCR2.
Bits 5 to 3: Receive Up Code Length Definition Bits (RUP[2:0])
Bits 2 to 0: Receive Down Code Length Definition Bits (RDN[2:0])
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: This register has an alternate definition for T1 mode. See T1RIBCC.
Bit 0: Receive Loss of Signal Alternate Criteria (RLOSA). Defines the criteria for a loss of signal condition.
19-5856; Rev 4; 5/11
RUP2
RDN2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0 = LOS declared upon 255 consecutive zeros (125µs).
1 = LOS declared upon 2048 consecutive zeros (1ms).
RUP1
RDN1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
7
0
7
0
RUP0
RDN0
T1RIBCC (T1 Mode)
Receive In-Band Code Control Register
082h + (200h x (n - 1)) : where n = 1 to 4
E1RCR2 (E1 Mode)
Receive Control Register 2
082h + (200h x (n - 1)) : where n = 1 to 4
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
6
0
6
0
RUP2
5
0
5
0
LENGTH SELECTED
LENGTH SELECTED
8 : 16 bits
8 : 16 bits
1 bits
2 bits
3 bits
4 bits
5 bits
6 bits
7 bits
1 bits
2 bits
3 bits
4 bits
5 bits
6 bits
7 bits
RUP1
4
0
4
0
RUP0
3
0
3
0
DS26514 4-Port T1/E1/J1 Transceiver
RDN2
2
0
2
0
RDN1
1
0
1
0
164 of 305
RLOSA
RDN0
0
0
0
0

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