DS26514G Maxim Integrated, DS26514G Datasheet - Page 227

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DS26514G

Manufacturer Part Number
DS26514G
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS26514G

Part # Aliases
90-26514-G00

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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
The interrupt information register provides an indication of which status registers are generating an interrupt. When
an interrupt occurs, the host can read TIIR to quickly identify which of the transmit status registers are causing the
interrupt(s). These are real-time registers in that the bits will clear once the appropriate interrupt has been serviced
and cleared.
Bit 2: Transmit Latched Status Register 3 Interrupt Status (TLS3)
Bit 1: Transmit Latched Status Register 2 Interrupt Status (TLS2)
Bit 0: Transmit Latched Status Register 1 Interrupt Status (TLS1)
19-5856; Rev 4; 5/11
0 = No interrupt pending.
1 = Interrupt pending.
0 = No interrupt pending.
1 = Interrupt pending.
0 = No interrupt pending.
1 = Interrupt pending.
7
0
TIIR
Transmit Interrupt Information Register
19Fh + (200h x (n - 1)) : where n = 1 to 4
6
0
5
0
4
0
3
0
DS26514 4-Port T1/E1/J1 Transceiver
TLS3
2
0
TLS2
1
0
227 of 305
TLS1
0
0

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