DS26514G Maxim Integrated, DS26514G Datasheet - Page 253

• Manufacturer Part Number: DS26514G
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26514G

• Part # Aliases: 90-26514-G00

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 6: BERT Bit Error Detected Event (BBED)
Bit 3: BERT Receive All Ones Condition (BRA1)
Bit 2: BERT Receive All Zeros Condition (BRA0)
Bit 1: BERT Receive Loss Of Synchronization Condition (BRLOS)
Bit 0: BERT in Synchronization Condition (BSYNC)
10.7 Extended BERT Register Definitions
Table 10-29. Extended BERT Register Set
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 1: 55 Octet Pattern (55OCT). This bit selects data pattern used by the transmit and receive circuits.
Bit 0: Byte Alignment to DS0 boundary(BALIGN).
19-5856; Rev 4; 5/11
ADDR
1400
1401
1402
1403
1404
1405
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled—interrupts on rising and falling edges.
0 = Interrupt masked.
1 = Interrupt enabled—interrupts on rising and falling edges.
0 = Interrupt masked.
1 = Interrupt enabled—interrupts on rising and falling edges.
0 = Interrupt masked.
1 = Interrupt enabled—interrupts on rising and falling edges.
0 = 55 Octet Pattern disabled.
1 = 55 Octet pattern enabled, when Modified 55 Octet (Daly) Pattern is selected by BC1.PSn register bits.
A low-to-high transition causes the Transmit BERT pattern to be byte-aligned to the DS0 boundary. This
bit should be toggled from low to high when a pattern load is executed (BC1.TC)
ABBR
7
0
-
—
7
0
BERT Control Register 3
BERT Real-Time Status Register
BERT Latched Status Register 1
BERT Status Interrupt Mask 1
BERT Latched Status Register 1
BERT Status Interrupt Mask 2
BSIM
BERT Status Interrupt Mask Register
110Fh + (10h x (n - 1)) : where n = 1 to 4
BC3
BERT Control Register 3
1400h + (10h x (n-1)) : where n = 1 to 4
6
0
-
BBED
6
0
DESCRIPTION
5
0
-
—
5
0
4
0
-
—
4
0
3
0
-
BRA1
3
0
2
0
-
R/W
R/W
R/W
R/W
R/W
R/W
R
DS26514 4-Port T1/E1/J1 Transceiver
55OCT
BRA0
1
0
2
0
BALIGN
BRLOS
0
0
1
0
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BSYNC
0
0