PNX1302EH NXP Semiconductors, PNX1302EH Datasheet - Page 390

• Manufacturer Part Number: PNX1302EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1302EH

• Lead Free Status / RoHS Status: Not Compliant

Philips Semiconductors
Convert signed integer to floating-point
SYNTAX
FUNCTION
DESCRIPTION
writes the result into rdest. Rounding is according to the IEEE rounding mode bits in PCSW. If
IEEE exception, such as inexact, the corresponding exception flags in the PCSW are set. The PCSW exception flags
are sticky: the flags can be set as a side-effect of any floating-point operation but can only be reset by an explicit
writepcsw
other floating-point compute operations update the PCSW at the same time, the net result in each exception flag is the
logical OR of all simultaneous updates ORed with the existing PCSW value for that exception flag.
modification of the destination register. If the LSB of rguard is 1, rdest and the exception flags in PCSW are written;
otherwise, rdest is not changed and the operation does not affect the exception flags in PCSW.
EXAMPLES
r30 = 3
r40 = 0xffffffff (-1)
r10 = 0, r50 = 0xfffffffd
r20 = 1, r50 = 0xfffffffd
r60 = 0x7fffffff (2147483647)
r70 = 0x80000000 (-2147483648)
r80 = 0x7ffffff1 (2147483633)
The
The
The
[ IF rguard ] ifloat rsrc1 → rdest
if rguard then {
}
rdest ← (float) ((long)rsrc1)
ifloat
ifloatflags
ifloat
Initial Values
operation. The update of the PCSW exception flags occurs at the same time as rdest is written. If any
operation converts the signed integer value in rsrc1 to single-precision IEEE floating-point format and
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
operation computes the exception flags that would result from an individual
ifloat r30 → r100
ifloat r40 → r105
IF r10 ifloat r50 → r110
IF r20 ifloat r50 → r115
ifloat r60 → r117
ifloat r70 → r120
ifloat r80 → r122
Operation
PRELIMINARY SPECIFICATION
r100 ← 0x40400000 (3.0)
r105 ← 0xbf800000 (-1.0)
no change, since guard is false
r115 ← 0xc0400000 (–3.0)
r117 ← 0x4f000000 (2.147483648e+9), INX flag set
r120 ← 0xcf000000 (-2.147483648e+9)
r122 ← 0x4f000000 (2.147483648e+9), INX flag set
PNX1300/01/02/11 DSPCPU Operations
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
ufloat ifloatrz ufloatrz
ifixieee ifloatflags
Result
ATTRIBUTES
SEE ALSO
ifloat
ifloat
ifloat
causes an
.
falu
1, 4
No
20
—
1
3
A-92