MA180023 Microchip Technology, MA180023 Datasheet - Page 93

MODULE PLUG-IN PIC18F46J11 PIM

MA180023

Manufacturer Part Number
MA180023
Description
MODULE PLUG-IN PIC18F46J11 PIM
Manufacturer
Microchip Technology
Series
PIC®r
Datasheet

Specifications of MA180023

Accessory Type
Plug-In Module (PIM) - PIC18F46J11
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
PIC18
Supported Devices
Stand-alone Or W/ HPC(DM183022) Or PIC18(DM183032)
Silicon Manufacturer
Microchip
Core Architecture
PIC
Core Sub-architecture
PIC18
Silicon Core Number
PIC18F
Silicon Family Name
PIC18FxxJxx
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
HPC Explorer Board (DM183022) or PIC18 Explorer Board (DM183032)
For Use With
DM183032 - BOARD EXPLORER PICDEM PIC18DM183022 - BOARD DEMO PIC18FXX22 64/80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MA180023
Manufacturer:
Microchip Technology
Quantity:
135
5.6.1
Enabling the PIC18 extended instruction set changes
the behavior of Indirect Addressing using the FSR2
register pair and its associated file operands. Under
proper conditions, instructions that use the Access
Bank, that is, most bit and byte-oriented instructions,
can invoke a form of Indexed Addressing using an
offset specified in the instruction. This special address-
ing mode is known as Indexed Addressing with Literal
Offset, or Indexed Literal Offset mode.
When using the extended instruction set, this
addressing mode requires the following:
• The use of the Access Bank is forced (‘a’ = 0);
• The file address argument is less than or equal to
Under these conditions, the file address of the
instruction is not interpreted as the lower byte of an
address (used with the BSR in Direct Addressing) or as
an 8-bit address in the Access Bank. Instead, the value
is interpreted as an offset value to an Address Pointer
specified by FSR2. The offset and the contents of
FSR2 are added to obtain the target address of the
operation.
© 2009 Microchip Technology Inc.
and
5Fh.
INDEXED ADDRESSING WITH
LITERAL OFFSET
PIC18F46J11 FAMILY
5.6.2
Any of the core PIC18 instructions that can use Direct
Addressing are potentially affected by the Indexed
Literal Offset Addressing mode. This includes all byte
and bit-oriented instructions, or almost one-half of the
standard PIC18 instruction set. Instructions that only
use Inherent or Literal Addressing modes are
unaffected.
Additionally, byte and bit-oriented instructions are not
affected if they use the Access Bank (Access RAM bit is
‘1’) or include a file address of 60h or above. Instructions
meeting these criteria will continue to execute as before.
A comparison of the different possible addressing
modes when the extended instruction set is enabled is
provided in Figure 5-9.
Those who desire to use byte or bit-oriented instruc-
tions in the Indexed Literal Offset mode should note the
changes to assembler syntax for this mode. This is
described in more detail in Section 26.2.1 “Extended
Instruction Syntax”.
INSTRUCTIONS AFFECTED BY
INDEXED LITERAL OFFSET MODE
DS39932C-page 93

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