MA180023 Microchip Technology, MA180023 Datasheet - Page 214

• Manufacturer Part Number: MA180023
• Description: MODULE PLUG-IN PIC18F46J11 PIM
• Manufacturer: Microchip Technology
• Series: PIC®r

Specifications of MA180023

• Accessory Type: Plug-In Module (PIM) - PIC18F46J11
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: PIC18
• Supported Devices: Stand-alone Or W/ HPC(DM183022) Or PIC18(DM183032)
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18FxxJxx
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: HPC Explorer Board (DM183022) or PIC18 Explorer Board (DM183032)
• For Use With: DM183032 - BOARD EXPLORER PICDEM PIC18DM183022 - BOARD DEMO PIC18FXX22 64/80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F46J11 FAMILY
14.5.2
The Timer3 gate source can be selected from one of
four different sources. Source selection is controlled by
the T3GSSx bits of the T3GCON register. The polarity
for each available source is also selectable. Polarity
selection is controlled by the T3GPOL bit of the
T3GCON register.
TABLE 14-2:
14.5.2.1
The T3G pin is one source for Timer3 gate control. It
can be used to supply an external source to the Timer3
gate circuitry.
14.5.2.2
When Timer0 increments from FFh to 00h, a
low-to-high pulse will automatically be generated and
internally supplied to the Timer3 gate circuitry.
FIGURE 14-3:
DS39932C-page 214
T3GSS<1:0>
TMR3GE
T3GPOL
T3GVAL
T3G_IN
T3GTM
Timer3
T1CKI
00
01
10
11
TIMER3 GATE SOURCE
SELECTION
T3G Pin Gate Operation
Timer0 Overflow Gate Operation
Timer3 Gate Pin
Overflow of Timer0
(TMR0 increments from FFh to 00h)
TMR2 to Match PR2
(TMR2 increments to match PR2)
Reserved
TIMER3 GATE SOURCES
N
TIMER3 GATE TOGGLE MODE
Timer3 Gate Source
N + 1 N + 2 N + 3
14.5.2.3
The TMR2 register will increment until it matches the
value in the PR2 register. On the very next increment
cycle, TMR2 will be reset to 00h. When this Reset
occurs, a low-to-high pulse will automatically be
generated and internally supplied to the Timer3 gate
circuitry.
14.5.3
When Timer3 Gate Toggle mode is enabled, it is
possible to measure the full cycle length of a Timer3
gate signal, as opposed to the duration of a single level
pulse.
The Timer1 gate source is routed through a flip-flop that
changes state on every incrementing edge of the
signal. See Figure 14-3 for timing details.
The T3GVAL bit will indicate when the Toggled mode is
active and the timer is counting.
Timer3 Gate Toggle mode is enabled by setting the
T3GTM bit of the T3GCON register. When the T3GTM
bit is cleared, the flip-flop is cleared and held clear. This
is necessary in order to control which edge is
measured.
N + 4
TIMER3 GATE TOGGLE MODE
Timer2 Match Gate Operation
N + 5 N + 6 N + 7
© 2009 Microchip Technology Inc.
N + 8