MA180023 Microchip Technology, MA180023 Datasheet - Page 319

• Manufacturer Part Number: MA180023
• Description: MODULE PLUG-IN PIC18F46J11 PIM
• Manufacturer: Microchip Technology
• Series: PIC®r

Specifications of MA180023

• Accessory Type: Plug-In Module (PIM) - PIC18F46J11
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: PIC18
• Supported Devices: Stand-alone Or W/ HPC(DM183022) Or PIC18(DM183032)
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18FxxJxx
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: HPC Explorer Board (DM183022) or PIC18 Explorer Board (DM183032)
• For Use With: DM183032 - BOARD EXPLORER PICDEM PIC18DM183022 - BOARD DEMO PIC18FXX22 64/80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 18-4:
© 2009 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
PIR3
PIE3
IPR3
TRISC
TRISB
SSP1BUF
SSPxADD
SSPxMSK
SSPxCON1
SSPxCON2
SSPxSTAT
SSP2BUF
SSP2ADD
Legend:
Note 1:
Name
2:
3:
(1)
— = unimplemented, read as ‘0’. Shaded cells are not used by the MSSPx module in I
SSPxMSK shares the same address in SFR space as SSPxADD, but is only accessible in certain I
operations in 7-Bit Masking mode. See Section 18.5.3.4 “7-Bit Address Masking Mode” for more details.
Alternate bit definitions for use in I
These bits are only available on 44-pin devices.
MSSP1 Address Register (I
MSSP1 Receive Buffer/Transmit Register
MSSP2 Receive Buffer/Transmit Register
MSSP2 Address Register (I
GIE/GIEH PEIE/GIEL
PMPIF
PMPIE
PMPIP
OSCFIF
OSCFIE
OSCFIP
SSP2IE
SSP2IP
TRISC7
TRISB7
SSP2IF
WCOL
GCEN
GCEN
MSK7
Bit 7
SMP
REGISTERS ASSOCIATED WITH I
(3)
(3)
(3)
ACKSTAT
ACKSTAT ADMSK5
TRISC6
TRISB6
SSPOV
BCL2IF
BCL2IE
BCL2IP
CM2IE
CM2IP
CM2IF
MSK6
ADIE
ADIP
Bit 6
ADIF
CKE
2
TMR0IE
TRISC5
TRISB5
SSPEN
ACKDT
2
CM1IF
CM1IE
CM1IP
RC2IF
RC2IE
RC2IP
RC1IF
RC1IE
RC1IP
C™ Slave mode), MSSP1 Baud Rate Reload Register (I
MSK5
C Slave mode), MSSP2 Baud Rate Reload Register (I
Bit 5
D/A
2
C Slave mode operations only.
(2)
ADMSK4
TRISC4
TRISB4
ACKEN
INT0IE
TX2IE
TX2IP
TX1IE
TX1IP
TX2IF
TX1IF
MSK4
Bit 4
CKP
—
—
—
P
2
(2)
C™ OPERATION
ADMSK3
PIC18F46J11 FAMILY
TMR4IE
TMR4IP
TMR4IF
SSP1IF
SSP1IE
SSP1IP
BCL1IE
BCL1IP
TRISC3
TRISB3
BCL1IF
SSPM3
RCEN
MSK3
RBIE
Bit 3
S
(2)
ADMSK2
CTMUIF
CTMUIE
CTMUIP
TMR0IF
CCP1IF
CCP1IE
CCP1IP
TRISC2
TRISB2
SSPM2
LVDIE
LVDIP
LVDIF
MSK2
Bit 2
PEN
R/W
(2)
ADMSK1
TMR3GIE
TMR3GIP
TMR3GIF
TMR2IF
TMR2IE
TMR2IP
TMR3IF
TMR3IE
TMR3IP
TRISC1
TRISB1
SSPM1
INT0IF
MSK1
RSEN
Bit 1
UA
2
2
C Master mode)
C Master mode)
2
(2)
C™ mode.
TMR1IE
TMR1IP
TMR1IF
CCP2IF
CCP2IE
CCP2IP
TRISC0
TRISB0
SSPM0
DS39932C-page 319
RTCIF
RTCIE
RTCIP
MSK0
RBIF
Bit 0
SEN
SEN
BF
2
C Slave mode
on Page:
Values
64, 67
64, 67
64, 67
Reset
64, 67
64, 67
63
65
65
65
65
65
65
65
65
65
66
66
64
67
67