cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 253

• Manufacturer Part Number: cx28560
• Description: Hdlc Controller
• Manufacturer: Mindspeed Technologies

CX28560 Data Sheet
E.1.3
Table E-1. Data/Status Combinations
28560-DSH-001-B
State
0
1
2
3
4
5
Overkill
Data_Hi
Status
The analysis presented in the continuation of this document does not take into account
any HDLC processing of data when calculating amounts of data received by the
CX28560. The HDLC processing includes the following:
The passing of the status later than the data can only be caused by the RSLP removing
CRC bytes and detecting a flag. Because this would require the removal of 2 bytes
from the possible data that could arrive, this situation is not included in the analysis.
X
X
X
X
X
•
• At least one flag is received per message—negligible affect in long messages,
• CRC bytes—0, 2, or 4 bytes that may or may not be passed to the buffer
is not passed to the buffer controller—though a minimum of 0— hence not
overkill;
but for the short messages used in the analysis they have a larger affect—
overkill; therefore, for every message considered to have arrived, 1 input byte
will be removed (the equivalent of removing one flag per message).
controller. Since they may be passed to the buffer controller they are not
overkill. However, due to the architecture, the RSLP passes to the BUFFC one
of the data/status combinations listed in
Zero insertions—a maximum of an extra 1/6 of the data received by the RSLP
Mindspeed Technologies™
Status
Status
Status
Status
Data
Data
Advance Information
Data
Data
Data
X
X
X
Data_Low
Table ,
.
Data
Data
Data
Data
X
X
Buffer Controller FIFO Size Calculation
Data
Data
Data
Data
Data
X
E
-
3