cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 171

• Manufacturer Part Number: cx28560
• Description: Hdlc Controller
• Manufacturer: Mindspeed Technologies

CX28560 Data Sheet
7.3
7.3.1
7.3.1.1
7.3.1.2
7.3.1.3
28560-DSH-001-B
Transparent Mode
Message Configuration Bits—Transparent Mode
Channel-Level Recovery Actions:
The CX28560 supports a completely transparent mode where no distinction is made
between information and non-information bits in the channel bit stream. This mode is
assigned on a per-channel and per-direction basis by the PROTOCOL bit field in
Chapter
Configuration register.
The Transmit Fragment Header contains a group of bits that specify the data to be
transmitted after the end of a transparent mode message. The bits are specified as
follows:
NOTE:
Idle Code
Idle Code (IC) bit field selects one of a set of idle pad fill octets to be sent after the
current message is transmitted in the event the next fragment has not been received or
inter-message pad fill is requested via PADCNT.
Intermessage Pad Fill
Pad Count (PADCNT) bit field specifies how many pad fill octets (selected by IC) are
transmitted between messages. PADCNT specifies the minimum number of pad fill
octets plus one, as follows:
Ending a Message with an Abort or Sending an Abort Sequence
When the ERR line on the Data POS-PHY is asserted, the CX28560 interprets this as
a request to end an in-progress message with the abort sequence. Abort sequence for
Transparent mode is defined to be a sequence of all 1s. The abort sequence is
terminated only when new data is received for the channel. In this case, the CX28560
• RBUFFC is not affected and continues to transfer message data to the host.
• None required.
• Idle Code specification, IC
• Intermessage Pad Fill Count, PADCNT
• Send an Abort Sequence.
1.
2.
3.
1.
2.
3.
4.
Message configuration bits are also used in HDLC mode, but their meaning is
slightly different. Refer above to Message Configuration Bits– HDLC Mode.
IC = 0: all ones pad fill.
IC = 1: HDLC Flag pad fill.
IC = 2: all zeroes pad fill.
PADCNT = 0: one IC
PADCNT = 1: two ICs
PADCNT = 2: three ICs
etc.
5.0, RSLP Channel Configuration register and
Mindspeed Technologies™
Advance Information
Chapter
5.0, TSLP Channel
Basic Operations
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