cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 25

• Manufacturer Part Number: cx28560
• Description: Hdlc Controller
• Manufacturer: Mindspeed Technologies

CX28560 Data Sheet
1.2.1.2
1.2.2
1.2.3
28560-DSH-001-B
Expansion Bus (EBUS)
PCI Bus Interface
Transmit FlowConductor Interface
The CX28560 provides the system with information necessary to calculate free buffer
space available in the CX28560’s transmit buffers. This information is reported in
packets of a specified format (see
Format, transmitted over an 8-bit, 100 MHz, standard, level 3, unidirectional, POS-
PHY dedicated feedback interface. The format of the report is a counter based system
whereby the system receives information regarding the amount of data transmitted
since the previous report, and keeps track of the amount of space presently available
in the channel’s transmit buffer. The packets received by the system contain the
channel number, and the amount of space freed since the previous report for that
channel was sent. (See
The system should be able to respond, if necessary, to the reports within 5 µs. This
interface may be fully utilized. See
Format.
CX28560 provides an access to a local 32-bit bus interface called the Expansion Bus
(EBUS), which provides a host processor access to any address in the peripheral
memory space on the EBUS. Although EBUS use is optional, the most notable
applications for EBUS are connections to peripheral devices, such as Bt8370/Bt8398
T1/E1 framers, CX28398 (Octal DS1/E1 framers), and CX29503/M29513 BAM3/
BAM3+ and CX29610 OptiPhy that are local to the CX28560’s serial port.
The CX28560 provides access to the EBUS through an interface similar to a mailbox
interface. This interface provides all the EBUS read and write accesses to be carried
over the PCI bus allowing bursts. This mechanism improves the PCI use when
multiple EBUS accesses are needed for accessing the configuration of the peripheral
devices.
The EBUS may be configured to use the Intel- or Motorola-style using a special bit in
the EBUS configuration register within the Host Service Unit (HSU). The EBUS also
supports slow devices by allowing the address/data to be transferred over multiple
cycles and thus allowing slow devices to read the address, access the data, or write it
into their memories.
A standard PCI 2.2 bus interface is provided to the system as an interface for
configuring and reading the CX28560 registers, counters, and interrupts.
The CX28560 acts as a PCI master. Configuration reads and writes and other
commands are written by the system to the shared memory. These commands are
retrieved via the CX28560’s HSU block, and passed internally to the relevant block to
be performed. Interrupts collated by the CX28560 are written to a user-configurable
address in the shared memory for collection by the system.
Mindspeed Technologies™
Advance Information
Appendix C
Table 5-56, CX28560 Flow Conductor Packet
Table 5-56, CX28560 Flow Conductor Packet
for flow conductor interface).
Introduction
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