cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 181
cx28560
Manufacturer Part Number
cx28560
Description
Hdlc Controller
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28560.pdf
(274 pages)
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CX28560 Data Sheet
Table 8-7. PCI Input/Output Timing Parameters
28560-DSH-001-B
T
T
T
T
T
T
T
NOTE(S):
(1)
(2)
(3)
on
off
su
val
val
ds
dh
Minimum and maximum times are evaluated at 50 pF equivalent load. Actual test capacitance may vary, and results should be
correlated to these specifications.
REQ* and GNT* are the only point-to-point signals, and have different output valid delay and input setup times than do bused
signals. GNT* has a setup of 10 ns; REQ* has a setup of 12 ns for 33 MHz.
For purposes of active/float timing measurements, the hi-Z or off state is defined to be when the total current delivered through
the component pin is less than or equal to the leakage current specification at 50 pF equivalent load.
(ptp)
(ptp)
Symbol
PCLK to Signal Valid Delay–Bused Signal
PCLK to Signal Valid Delay–Point To Point
Float to Active Delay
Active to Float Delay
Input Setup Time to Clock–Bused Signal
Input Setup Time to Clock–Point To Point
Input Hold Time from Clock
(3)
(3)
Mindspeed Technologies™
Parameter
Advance Information
(2)
(
(2)
1, 2)
(
1, 2)
33 MHz
10, 12
Min
1.6
1.6
Electrical and Mechanical Specification
—
0
2
7
Max
MHz
33
11
12
—
28
—
—
—
Units
ns
ns
ns
ns
ns
ns
ns
8
-
5
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