cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 129

• Manufacturer Part Number: cx28560
• Description: Hdlc Controller
• Manufacturer: Mindspeed Technologies

CX28560 Data Sheet
5.8
5.8.1
Table 5-40. TSLP Channel Status Register
28560-DSH-001-B
31:4
Bit
3:1
0
Field Name
RSVD
RSVD
TACTIVE
Transmit path registers contain the information necessary to configure the receive direction. This
configuration includes registers that are related to the BUFFC block, host interface, registers that
control the TSLP, and TSIU.
The TSLP Channel Status register is a Read Only (RO) register. It provides information from TSLP
block regarding the channel state. There is one TSLP Channel status register for each of the
CX28560’s channels (i.e., 2047 registers).
Transmit Path Registers
TSLP Channel Status Register
Host
R
R
R
Default Value
X
X
X
Mindspeed Technologies™
Advance Information
Value
0
0
0
1
Reserved.
Reserved.
Channel Inactive.
The channel has been deactivated due to either a Service
Request Channel Deactivation, Reset (PCI Reset or Soft Chip
Reset), or one of the following transmit errors: TxBUFF, TxCOFA.
Channel Active.
The channel has been activated by service request channel
activation.
Description
The CX28560 Memory Organization
5
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