cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 161

• Manufacturer Part Number: cx28560
• Description: Hdlc Controller
• Manufacturer: Mindspeed Technologies

CX28560 Data Sheet
7.2.1
7.2.2
7.2.3
28560-DSH-001-B
Frame Check Sequence
Opening/Closing Flags
Abort Codes
In the transmit direction, the fragment header of a message specifies intermessage bit-
level operations. Specifically, when the EOM bit field is set to 1 within the fragment
header, it signifies that the present fragment represents the last fragment for the
current message being transmitted and the bit fields IC and PADCNT take effect.
These bits are described in this chapter,
The CX28560 is configured to calculate and insert either a 16- or 32-bit Frame Check
Sequence (FCS) for HDLC packets, provided the packet length contains a minimum
of 2 octets. The FCS is always calculated over the entire packet length.
For all HDLC modes that require FCS calculation, the polynomials used to calculate
FCS are according to ITU-T Q.921 and ISO 3309-1984.
For HDLC modes only, the CX28560 supports the use of opening and closing
message flags. The 7Eh (01111110b) flag is the opening and closing flag. An HDLC
message is always bounded by this flag at the beginning and the end of the message.
The CX28560 supports receiving a shared flag where the closing flag of one message
can act as the opening of the next message. The CX28560 also supports receiving a
shared-zero bit between two flags—that is, the last zero bit of one flag is used as the
first zero bit of the next flag. Receiving a shared zero between the FCS and the closing
flag is not supported.
The CX28560 can be configured to transmit a shared flag between successive
messages by configuring the bit field PADCNT in each transmit fragment header
(specifically the last fragment header of a message). The CX28560 does not transmit
shared-zero bits between successive flags.
Seven consecutive 1s constitute an abort code. Receiving the abort code causes the
current frame processing to be aborted and further data transfer into shared memory
for that message is terminated. After detecting the abort code, The CX28560 enters a
scan mode, which searches for a new opening flag character.
Notification of this detected condition is provided in the last fragment header of the
message and/or an interrupt descriptor indicating the error condition Abort Flag
Termination.
• Check and extract 0-, 16- or 32-bit FCS
• Check frame length
• Check for octet alignment
• Check for abort sequence reception
• After channel activation, check for the first flag character to be received and
• CRC-16: x
• CRC-32: x
generate a CHIC interrupt
+ x + 1
Mindspeed Technologies™
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Advance Information
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Section
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7.2.5.
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Basic Operations
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