L64704 LSI Logic Corporation, L64704 Datasheet - Page 58

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

3.5.9
Group 3,
APR 11
RQ Readback
3.6
Group 4
Registers
3-26
This register displays the value on the RQ[5:0] input bus. Group 3, RQ
values are only correct when the PLL is set such that ICLK = OCLK.
Read/Write: R
Reserved
RQ
Most Group 4 registers are 8 bits wide while some registers are wider
(up to 24 bits). All accesses are done in 8-bit widths. The Address
Pointer Register (APR) is used to access these registers as described in
Section
Group 4 registers are not affected by a reset. Group 4 registers appear
random immediately after power-up, and retain their last known value
after any of the three reset operations as shown in
It Affects Registers.” Table 3.4
Group 4 registers.
L64704 Registers
APR
11
D7
3.3, “Group 0, 1 Address Pointer Register.”
Reserved
Reserved Bits
These bits are reserved for LSI Logic internal use only.
When read, they will return an indeterminate value.
RQ Readback
This register displays the value on the RQ[5:0] input bus.
(Note that OCLK needs to be running for this feature to
operate properly).
D6
D5
shows the addresses and fields of the
D4
D3
RQ
D2
3.2, “Reset and How
Reset Value: 0x00
D1
D0
[7:6]
[5:0]