L64704 LSI Logic Corporation, L64704 Datasheet - Page 18

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L64704

Manufacturer Part Number
L64704
Description
Satellite Decoder Technical Manual 5/97
Manufacturer
LSI Logic Corporation
Datasheet

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Figure 1.1
L64704 Block Diagram
RQ
1-2
(MPEG-2
Transport
RI
Channel
Stream)
CO[7:0]
Output
CAR_VCO
CLK_VCO
Channel Input
from Satellite
2/T, 3/T, 4/T
PWR
Estimator
Descrambler
Offset
DC
Microcontroller Data and Address Bus
(DVB) Association. LSI Logic fabricates the L64704 using its LCB500K,
3.3-volt, 0.5-micron, HCMOS process technology.
The L64704 provides maximum integration and flexibility for system
designers at a minimum cost. The number of external components
required to build a system is minimal; only a dual operational amplifier
and passive resistors and capacitors are needed for the implementation
of the clock and carrier loop filters.
Figure 1.1
Introduction
Solomon
Decoder
shows a block diagram of the L64704.
Reed
FEC Decoder
Decimation
Pipeline
Filter
Convolutional
Deinterleaver
External Microcontroller Interface
Interleaver/
2/T
Synchronizer
Synchronizer
Microcontroller Data and Address Bus
Matched
Control
Carrier
Clock
AGC
Filter
Syncronizer
Solomon
Reed
2/T
Demodulator
BPSK/QPSK
Syncronizer
Decoder
Control
Output
Viterbi
Viterbi
DEMI
1/T
DEMQ

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