L64704 LSI Logic Corporation, L64704 Datasheet - Page 136

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

Figure 6.3
Phase Rotation for
Synchronization
6-4
synchronization stage. See
tions performed during phase rotation:
Q Input
Q Input
A misaligned data stream results in a difference in the bit error rate at
the Viterbi Decoder output, compared to that of the original message, of
about 0.5. The mechanism implemented provides strong correlation
between an out-of-sync condition and the observed bit error rate.
This first synchronization stage does not inspect the data stream for
specific synchronization patterns, nor does it remove any portions of the
data stream. Once the Viterbi Decoder module has reached synchroni-
zation, the following blocks in the data pipeline (the Deinterleaver and
Reed-Solomon Decoder) each require their own synchronization
procedures.
Decoding Pipeline Synchronization
I Input
I Input
Phase Rotation
page
6-10.)
I Output = I Input
Q Output =Q Input
I Output = Q Input
Q Output = I Input
Figure 6.3
outlines the opera-