L64704 LSI Logic Corporation, L64704 Datasheet - Page 111

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

Equation 5.2
Equation 5.3
Equation 5.4
Table 5.1
M as a Function of
CLK_DR and
CLK_RATIO
R
R
According to
For instance, if you choose CLK_RP = 10 = 0xA, then CLK_NF =
6 x 10 x 1024 = 61440 = 0xF000.
When the VCO clock frequency is within the pull-in range, the Clock
Synchronizer closes the clock recovery loop automatically and then
enters tracking mode.
5.5.2.2 Tracking Mode
In tracking mode (indicated by CLK_LCF; Group 3, APR 9 = 1), the clock
recovery loop is closed and the Sigma Delta (
input from the Timing Error Detector (TED) output rather than the AFC
output.
The loop characteristics are determined by the external active filter with
parameters R
The natural frequency
determined by the following formulas:
where M denotes the number of samples per symbol at the ADC and is
at least 2, K
rad/s/volt.
(Group 4, APR 14) and CLK_RATIO (Group 4, APR 18).
CLK_DR[1:0]
0
1
2
Channel Clock Recovery
60
CLK 1
CLK 2
CLK_RP 1024
C
C
CLK
CLK
Table 5.1
D
Equation
=
CLK1
=
is a constant equal to 1.4 volts, and K
M
2 x 2
4 x 2
3 x 2
------ -
------ -
2
1
n
2
n
, R
CLK_RATIO
CLK_RATIO
CLK_RATIO
illustrates how M depends on the value of CLK_DR
K
------------------------ -
CLK2
5.1, CLK_RP and CLK_NF must be set such that:
D
2 M
=
n
K
, C
and the damping factor
VCO
10 CLK_NF
CLK
, and the VCO gain K
) converter takes its
VCO
of the loop are
VCO
is expressed in
.
5-7