L64704 LSI Logic Corporation, L64704 Datasheet - Page 201

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

Group 4, APR 33 – Set the Carrier Loop Configuration register to 0x25
when this register’s bits are set as shown in the following table.
Bit Setting Meaning
Together, bits 6 and 7 may be set to any one of four values. Use the fol-
lowing guidelines for programming these bits:
1. If the carrier frequency sweep gets stuck at the upper or lower rail,
2. If the carrier is locked but the constellation is rotated by 45 degrees,
Set Group 4, APR 33 to 0x25. When the Carrier and FEC Synchroniza-
tion Status register (Group 3, APR 9) indicates a lock, change it to 0x24.
Group 4, APR 34 – Set to 0 – All of the bits in this register must be set
to 0 for proper operation.
Group 4, APR 35 – The settings in the Decoder Configuration register
are application dependent. Do not use the SNR estimator in this
example.
Group 3, APR 6-7 – CAR_VCOF[13:0] = shows the result of the VCO
frequency measurement. The resolution of the received value depends
on the prescaler as shown in the following table.
Prescaler Divisor
Group 3, APR 9 – STATUS[2:0] is a read-only register.
QPSK Demodulator Configuration Example
0
1
2
3
4
5
6
7
change the polarity of the bits until the sweep works correctly.
reverse the polarity of each bit.
1
0
1
0
0
1
0
0
16
32
Carrier sweep on
CAR_OPEN. Set to one only to get out of false lock
0 = DDML, 1 = NDAML
0 = Sigma Delta, 1 = 6-bit output to DAC
CAR_VCO1N/P, 0 = active, 1 = 3-state
CAR_VCO2N/P, 0 = active, 1 = 3-state
CAR_VCOxN/P output polarity, 0 = normal, 1 = swapped
Sweep Direction, 0 = normal, 1 = swapped
f
VCO
19.5
39
(kHz)
B-13