L64704 LSI Logic Corporation, L64704 Datasheet - Page 184

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

A.2
Programming
the Slave
Address Using
the Serial Bus
Interface
Figure A.3
General Call
Structure
A.3
Write Cycle
Using the Serial
Bus Interface
A-4
A general call (Master does a start condition followed by eight 0’s as
shown in
serial bus. Any device that requires information to be supplied through
this general call structure should acknowledge the cycle. The second
byte has the following meaning when its LSB is “0”:
00000110 (0x6)
1. S = Start Condition.
2. A = Acknowledge Cycle.
Refer to the following figure for a burst, or a single write cycle. The fol-
lowing cycles must take place for a write cycle:
1. The master starts the cycle with the start condition.
2. The master transmits the 7-bit slave address.
3. The master transmits an eighth bit (the R/W bit) = 0 to indicate a
4. The addressed slave acknowledges the reception of the slave
5. The master sends the 8-bit Group 0 address (0x0) to indicate that
6. The master then sends the 8-bit data. This data is used to initialize
7. The master generates another start condition.
8. The master repeats steps 2-7 to address the appropriate group and
9. The master terminates the cycle by issuing a stop condition.
Programming the L64704 Using the Serial Bus Protocol
S
0
write cycle.
address by driving SDATA low in the ACK cycle.
the APR is to be loaded. (Group 0 is accessed only to load the APR).
the Address Pointer register (APR0/1).
write one or more data bytes.
General Call Address
0 0 0 0
Figure
0 0 0
A.3) address is used to address every device on the
Reset and write the programmable part of the slave address
by hardware. For the L64704, this means reading the D[7:1]
pins. (These pins are unused when the serial interface is in
use, and can be hardwired to any legal 7-bit address value).
A
X
X X X X
X
X 0
A