L64704 LSI Logic Corporation, L64704 Datasheet - Page 108

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

5.4
Matched Filter
5.5
Channel Clock
Recovery
Figure 5.3
Clock Recovery Loop
5-4
VCO
External Analog
to Dual ADC Converter
Circuitry
Loop
Filter
The L64704 implements a fixed matched filter on the I and Q branches
according to the DVB standard (square root raised cosine shape with roll-
off B = 0.35). The filter operates at a constant input rate of 2/T.
Figure 5.3
sists of the L64704’s Clock Synchronizer and external analog circuitry.
The Clock Synchronizer generates the loop voltage for an external VCO
from the L64704’s matched-filtered I and Q samples. The Clock Synchro-
nizer delivers this voltage to the two balanced CMOS differential output
pins CLK_VCON and CLK_VCOP. These outputs feed the inverting and
noninverting inputs of an external operational amplifier that implements
the loop filter before the VCO.
Demodulator Module Functional Description
XTAL
CLK_VCON
CLK_VCOP
XOIN
XOUT
CLK
illustrates the Channel Clock recovery loop. This circuit con-
L64704 Channel Clock Synchronizer
CLK_VCO_SWAP
Register
Converter
AFC
CLK_LCF_SUPPRESS
Register
Matched Filter
Timing Error
CLK_LCF
SCLK
CLK_NF
Register
CLK_RP
Register
Detector
Outputs
I
Q