L64704 LSI Logic Corporation, L64704 Datasheet - Page 150

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L64704

Manufacturer Part Number
L64704
Description
Satellite Decoder Technical Manual 5/97
Manufacturer
LSI Logic Corporation
Datasheet

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Figure 7.4 (Cont.)
Puncture Pattern for
Different Code Rates
Rate 5/6
Rate 7/8
7.1.4
Viterbi Bit Error
Rate Monitor
7-6
Punctured Symbol (Deleted)
Data (QPSK)
L64704 Input
Data (QPSK)
L64704 Input
Data (BPSK)
Data (BPSK)
Viterbi Input
Viterbi Input
Punctured
Punctured
Data
Data
A performance monitor for the channel bit error rate (BER) is built into
the L64704. The monitor compares an appropriately delayed version of
the incoming channel data stream to the re-encoded Viterbi decoder out-
put data stream to find occurrences of bit errors.
block diagram of the Viterbi bit error detection circuit.
The Viterbi decoder core latency delays depunctured data. The rate
equal to 1/2 Viterbi decoder core produces a decoded bitstream that is
being convolutionally re-encoded. This results in a symbol stream that
can be compared on a symbol-by-symbol basis against the incoming
The FEC Decoder Pipeline
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Figure 7.5
Q.6
shows a
I.7

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