L64704 LSI Logic Corporation, L64704 Datasheet - Page 41

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

3.1.2
Programming
Using the Serial
Interface
3.2
Reset and How
It Affects
Registers
Setting the HOST_MODE pin LOW during reset places the L64704 in
Serial Host Interface mode. When the L64704 is addressed using the
serial interface, it must first be programmed with a 7-bit slave address
before any other read or write cycles.
L64704 Using the Serial Bus Protocol, ”
of the protocol used when programming the L64704 in Serial Host
Interface mode.
There are three separate resets available on the L64704; the hardware
RESET pin, the DEMOD_RST register bit and the FEC_RST register bit
(Group 4, APR 36). Each affects the registers differently:
Registers in Group 4 are unaffected by any of these reset operations.
Group 4 registers appear random immediately after power-up, and retain
their last known value after any of the three reset operations listed above.
The following steps should be followed when resetting the L64704:
Reset and How It Affects Registers
Toggling the hardware RESET pin resets all of the Group 2 and
Group 3 registers. Registers in Group 4 are unaffected.
Setting the DEMOD_RST bit in the External Output Control Bits and
Reset Register (Group 4, APR 36) affects only the bits in Group 3
registers that are directly concerned with the demodulator circuitry.
Setting the FEC_RST bit in the External Output Control Bits and
Reset Register (Group 4, APR 36) resets the System Mode/Status
registers (Group 2) and any bits in Group 3 registers that are directly
concerned with the demodulator circuitry.
Issue an active HIGH reset pulse to the RESET pin.
Program the Configuration (Group 4) registers to their proper values.
Issue a soft reset by setting the DEMOD_RST bit and the FEC_RST
bits to 1 (Group 4, APR 36). These bits are self-resetting, and do not
have to be cleared.
Wait the amount specified by the parameter t
Start the L64704.
Appendix A, “Programming the
contains a detailed description
WK
(see
Figure
8.4).
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