L64704 LSI Logic Corporation, L64704 Datasheet - Page 51

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

S2_S
S1_LS
S1_S
Reserved
Group 2 Registers
if the S2_LS_IE bit is set in the SMR. The L64704 clears
S2_LS to zero after a reset or a Group 2 (STS) read.
Stage 2 Synchronization Flag
The L64704 sets S2_S when the Deinterleaver/Reed-
Solomon Decoder synchronization module acquires
synchronization. It also generates an interrupt if the
S2_S_IE bit is set in the SMR. The L64704 clears S2_S
to zero after a reset or a Group 2 (STS) read.
Stage 1 Loss of Synchronization Flag
The L64704 sets S1_LS when the Viterbi Decoder
synchronization module determines that synchronization
is lost. It also generates an interrupt if the S1_LS_IE bit
is set in the SMR. The L64704 clears S1_LS to zero after
a reset or a Group 2 (STS) read.
Stage 1 Synchronization Flag
The L64704 sets S1_S when the Viterbi Decoder
synchronization module has acquired synchronization. It
also generates an interrupt if the S1_S_IE bit is set in the
SMR. The L64704 clears S1_S to zero after a reset or a
Group 2 (STS) read.
Reserved Bit
This bit is reserved for LSI Logic internal use only. Read-
ing this bit will give unpredictable results.
S2_LS
0
1
S2_S
0
1
S1_LS
0
1
S1_S
0
1
Definition
Stage 2 Synchronization Status Unchanged
Loss of Stage 2 Synchronization Detected
Definition
Stage 2 Synchronization Status Unchanged
Stage 2 Synchronization Acquired
Definition
Stage 1 Synchronization Status Unchanged
Loss of Stage 1 Synchronization Detected
Definition
Stage 1 Synchronization Status Unchanged
Stage 1 Synchronization Acquired
3-19
3
2
1
0