CD2401 Intel, CD2401 Datasheet - Page 66

no-image

CD2401

Manufacturer Part Number
CD2401
Description
Multi-protocol Communications Controller
Manufacturer
Intel
Datasheet
CD2401 — Multi-Protocol Communications Controller
5.6.1
5.6.1.1
66
Figure 14. DMA Connections for the CD2401
Interface to a 32-Bit Data Bus
To interface to a 32-bit data bus, two 16-bit data buffers must be used to isolate the CD2401 A/
D[0–15] pins from either half of the 32-bit bus. The A[1] address pin determines if the lower or
upper half of the data bus is in use for a particular bus cycle. The CD2401 always drives all 16 data
bits during a register read or a DMA write operation, regardless of the size of the actual transfer.
DMA Connections for the
NOTES:
1. The 24-bit latch is required.
2. The 16-bit transceiver is optional depending on application.
3. The 32-bit driver is optional depending on drive requirements.
DATEN*
DATDIR*
R/W*
DS*
DTACK*
A/D [0–15]
ADLD*
A[0–7]
AEN*
AS*
en
dir
[16–31]
STROBE*
[8–15]
Transceiver
16-Bit
24-Bit
Latch
Data
DATA [0–15]
[8–31]
[0–7]
Address
Driver
32-Bit
MA [0–31]
Datasheet

Related parts for CD2401