CD2401 Intel, CD2401 Datasheet - Page 144

• Manufacturer Part Number: CD2401
• Description: Multi-protocol Communications Controller
• Manufacturer: Intel

CD2401 — Multi-Protocol Communications Controller
8.6.4.2
8.6.4.3
144
Register Name: ARBADRU
Register Description: Receive Buffer ‘A’ 32-bit Address – upper word
Default Value: x’0000
Access: Word Read/Write
Register Name: BRBADRL
Register Description: Receive Buffer ‘B’ 32-bit Address – lower word
Default Value: x’0000
Access: Word Read/Write
Bit 15
Bit 15
Bit 7
Bit 7
A Receive Buffer Address – Upper (ARBADRU) Register
This register contains the start addresses of the A external buffer used by the CD2401 to store the
receive data block. This register is written to by the host and copied internally to control the data
transfer to the memory.
B Receive Buffer Address – Lower (BRBADRL) Register
Bit 14
Bit 14
Bit 6
Bit 6
Bit 13
Bit 13
Bit 5
Bit 5
Binary Address Value, 32-bit Address bits 23:16
Binary Address Value, 32-bit Address bits 31:24
Binary Address Value, 32-bit Address, bits 15:8
Binary Address Value, 32-bit Address, bits 7:0
Bit 12
Bit 12
Bit 4
Bit 4
Bit 11
Bit 11
Bit 3
Bit 3
Bit 10
Bit 10
Bit 2
Bit 2
Motorola Hex Address: x’40
Motorola Hex Address: x’46
Bit 9
Bit 1
Bit 9
Bit 1
Intel Hex Address: x’42
Intel Hex Address: x’44
Datasheet
Bit 8
Bit 0
Bit 8
Bit 0