CD2401 Intel, CD2401 Datasheet - Page 100

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CD2401

Manufacturer Part Number
CD2401
Description
Multi-protocol Communications Controller
Manufacturer
Intel
Datasheet
CD2401 — Multi-Protocol Communications Controller
8.2.4
100
Register Name: COR3
Register Description: Channel Option 3
Default Value: x’00
Access: Byte Read/Write
Sndpad
Bit 7
Channel Option Register 3 (COR3)
COR3 — HDLC Mode
In Synchronous mode COR3 specifies the learning pattern (pad character) sent by the CD2401 to
synchronize the DPLL at the remote end. The pad character (00h or AAh) sent depends on the type
of encoding used.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bits 2:0
Bit 6
Alt1
Send Pad character
0 = CD2401 does not send any pad character.
1 = CD2401 sends pad character(s) before sending flag when coming out of the Idle
In Mark mode.
Send sync pattern
0 = 00h is sent as pad character (NRZI encoding).
1 = AAh is sent as pad character (Manchester/NRZ encoding).
FCS Preset
0 = FCS is preset to all ‘1’s (CRC V.41).
1 = FCS is preset to all ‘0’s (CRC-16).
FCS mode
0 = normal FCS mode. The CD2401 generates and appends CRC on transmit and
validates CRC on receive using CRC polynomial selected through the CPSR.
1 = disable FCS generation and checking. The CD2401 treats the entire frame as
data.
Idle mode
0 = idle in flag
1 = idle in mark
Character count [2:0]
These bits specify the number of synchronous characters sent.
FCSPre
Bit 5
pad2
0
0
0
0
1
Bit 4
FCS
pad1
0
0
1
1
0
Bit 3
idle
pad0
0
1
0
1
0
pad2
Bit 2
Reserved
1 pad character sent.
2 pad characters sent.
3 pad characters sent.
4 pad characters sent.
Motorola Hex Address: x’16
Function
pad1
Bit 1
Intel Hex Address: x’15
Datasheet
pad0
Bit 0

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