CD2401 Intel, CD2401 Datasheet - Page 4

• Manufacturer Part Number: CD2401
• Description: Multi-protocol Communications Controller
• Manufacturer: Intel

CD2401 — Multi-Protocol Communications Controller
6.0
7.0
8.0
4
5.5
5.6
Protocol Processing
6.1
6.2
6.3
6.4
6.5
6.6
6.7
Programming Examples
7.1
7.2
7.3
7.4
7.5
Detailed Register Descriptions
8.1
8.2
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.4.7
Bit Rate Generation and Data Encoding ............................................................. 58
Hardware Configurations .................................................................................... 65
5.6.1
5.6.2
HDLC Processing................................................................................................ 68
6.1.1
6.1.2
6.1.3
Async Processing................................................................................................ 70
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
6.2.7
6.2.8
Bisync Processing............................................................................................... 79
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
X.21 Call Setup Mode ......................................................................................... 83
6.4.1
X.21 Receive....................................................................................................... 84
Extended X.21 Mode........................................................................................... 85
6.6.1
6.6.2
Non-8-bit Data Transfers..................................................................................... 87
Global Initialization .............................................................................................. 89
Async Interrupt Setup Example........................................................................... 89
HDLC DMA Channel Setup Example.................................................................. 90
Receive DMA Interrupt Service Routine ............................................................. 90
Transmit Interrupt Service Routine ..................................................................... 91
Global Registers.................................................................................................. 92
8.1.1
8.1.2
Option Registers ................................................................................................. 93
DMA Data Transfer ................................................................................ 45
Bus Error Handling................................................................................. 46
A and B Buffers and Chaining ................................................................ 47
Transmit DMA Transfer .......................................................................... 48
Synchronous Transmitter Examples ...................................................... 49
Receive DMA Transfer ........................................................................... 51
Interface to a 32-Bit Data Bus ................................................................ 66
CD2401 as a DTE and DCE Interface.................................................... 67
Frame Check Sequence ........................................................................ 68
HDLC Transmit Mode............................................................................. 68
HDLC Receive Mode ............................................................................. 69
Transmitter In-Band Flow Control .......................................................... 70
Receiver In-Band Flow Control .............................................................. 71
Out-of-Band Flow Control ...................................................................... 71
Line Break Detection and Generation .................................................... 72
Special Characters Special Character Transmission ............................. 73
Special Character Recognition and Range ............................................ 74
Special Character Range ....................................................................... 74
UNIX‚ Support Features ......................................................................... 74
Bisync Transmit Processing................................................................... 79
Bisync Receive Processing.................................................................... 79
CRC Calculation in Bisync Mode ........................................................... 80
BCC Computation Formulas .................................................................. 81
Receive State Table ............................................................................... 82
X.21 Transmit......................................................................................... 83
Extended X.21 Transmit......................................................................... 85
Extended X.21 Receive.......................................................................... 86
Global Firmware Revision Code Register (GFRCR) .............................. 92
Channel Access Register (CAR) ............................................................ 92
............................................................................................... 68
........................................................................................ 88
........................................................................... 92
Datasheet