CD2401 Intel, CD2401 Datasheet - Page 152

• Manufacturer Part Number: CD2401
• Description: Multi-protocol Communications Controller
• Manufacturer: Intel

CD2401 — Multi-Protocol Communications Controller
8.6.5.9
8.6.5.10
152
Register Name: TCBADRL
Register Description: Current Transmit Buffer Address – lower word
Default Value: x’0000
Access: Word Read only
Register Name: TCBADRU
Register Description: Current Transmit Buffer Address – upper word
Default Value: x’0000
Access: Word Read only
Bit 15
Bit 15
Bit 7
Bit 7
EOB bit. When the host completes use of the buffer, it must issue the append complete command
through STCR. The CD2401, upon transmitting the last characters from the buffer, sets EOB, thus
allowing the host to allocate a new transmit buffer.
Transmit Current Buffer Address Register – Lower (TCBADRL)
Transmit Current Buffer Address Register – Upper (TCBADRU)
These registers contain the address into the current DMA buffer being used for transmit data. This
address is updated at the end of transmit data transfers. In the case of a bus error during transmit
data transfer, this register contains the starting address of the transfer causing the bus error.
Bit 14
Bit 14
Bit 6
Bit 6
Bit 13
Bit 13
Bit 5
Bit 5
Binary Address Value, 32-bit Address bits 31:24
Binary Address Value, 32-bit Address bits 23:16
Binary Address Value, 32-bit Address bits 15:8
Binary Address Value, 32-bit Address bits 7:0
Bit 12
Bit 12
Bit 4
Bit 4
Bit 11
Bit 11
Bit 3
Bit 3
Bit 10
Bit 10
Bit 2
Bit 2
Motorola Hex Address: x’3A
Motorola Hex Address: x’38
Bit 9
Bit 1
Bit 9
Bit 1
Intel Hex Address: x’3A
Intel Hex Address: x’38
Datasheet
Bit 8
Bit 0
Bit 8
Bit 0