MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 87

• Manufacturer Part Number: MC9S12C128VFU
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12C128VFU

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: CAN/SCI/SPI
• Program Memory Type: Flash
• Program Memory Size: 128KB
• Total Internal Ram Size: 4KB
• # I/os (max): 60
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/2.97V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

2.3.2.2.4
Read: Anytime.
Write: Anytime.
2.3.2.2.5
Read: Anytime.
Write: Anytime.
Freescale Semiconductor
Module Base + 0x000B
Module Base + 0x000C
RDRS[3:0]
PERS[3:0]
Reset
Reset
Field
Field
3–0
3–0
W
W
R
R
Reduced Drive Port S — This register configures the drive strength of each port S output pin as either full or
reduced. If the port is used as input this bit is ignored.
0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.
Reduced Drive Port S — This register configures whether a pull-up or a pull-down device is activated, if the port
is used as input or as output in wired-or (open drain) mode. This bit has no effect if the port is used as push-pull
output. Out of reset a pull-up device is enabled.
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
0
0
0
0
7
7
Port S Reduced Drive Register (RDRS)
Port S Pull Device Enable Register (PERS)
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 2-14. Port S Pull Device Enable Register (PERS)
0
0
0
0
6
6
Figure 2-13. Port S Reduced Drive Register (RDRS)
Table 2-12. RDRS Field Descriptions
Table 2-13. PERS Field Descriptions
MC9S12C-Family / MC9S12GC-Family
0
0
0
0
5
5
Rev 01.24
0
0
0
0
4
4
Description
Description
Chapter 2 Port Integration Module (PIM9C32) Block Description
RDRS3
PERS3
0
1
3
3
RDRS2
PERS2
0
1
2
2
RDRS1
PERS1
0
1
1
1
RDRS0
PERS0
0
1
0
0
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