MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 473

MC9S12C128VFU

Manufacturer Part Number
MC9S12C128VFU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12C128VFU

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/SCI/SPI
Program Memory Type
Flash
Program Memory Size
128KB
Total Internal Ram Size
4KB
# I/os (max)
60
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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17.3
This section describes the
17.3.1
The
addresses between
the logical page ranging from address 0x8000 to 0xBFFF to a physical 16K byte page in the Flash array
memory.
or
hold the boot loader code since it covers the vector space. Default protection settings as well as security
information that allows the MCU to restrict access to the Flash module are stored in the Flash configuration
field described in
1. By placing 0x3F in the HCS12 Core PPAGE register, the 16 Kbyte page can be seen twice in the MCU memory map.
Freescale Semiconductor
one growing downward from the Flash array end address. The higher address area is mainly targeted to
FTS16K
1
0xFF08–0xFF0C
0xFF00–0xFF07
Memory Map and Registers
Flash Address
The FPROT register (see
Module Memory Map
0xFF0D
0xFF0E
0xFF0F
memory map is shown in
Table
0xC000
17-1.
FTS16K
(bytes)
and 0xFFFF. The content of the HCS12 Core PPAGE register is used to map
Size
8
5
1
1
1
Table 17-1. Flash Configuration Field
memory map and registers.
Section
Backdoor Key to unlock security
Reserved
Flash Protection byte
Refer to
Reserved
Flash Security/Options byte
Refer to
MC9S12C-Family / MC9S12GC-Family
Figure
Section 17.3.2.5, “Flash Protection Register (FPROT)”
Section 17.3.2.2, “Flash Security Register (FSEC)”
17.3.2.5) can be set to globally protect the entire Flash array
17-2. The HCS12 architecture places the Flash array
Rev 01.24
Description
Chapter 17 16 Kbyte Flash Module (S12FTS16KV1)
473

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