MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 115

MC9S12C128VFU

Manufacturer Part Number
MC9S12C128VFU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12C128VFU

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/SCI/SPI
Program Memory Type
Flash
Program Memory Size
128KB
Total Internal Ram Size
4KB
# I/os (max)
60
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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3.3.2.3
Read: Anytime
Write: The EEON bit can be written to any time on all devices. Bits E[11:15] are “write anytime in all
modes” on most devices. On some devices, bits E[11:15] are “write once in normal and emulation modes
and write anytime in special modes”. See device overview chapter to determine the actual write access
rights.
This register initializes the position of the internal EEPROM within the on-chip system memory map.
Freescale Semiconductor
Module Base + 0x0012
Starting address location affected by INITRG register setting.
1. The reset state of this register is controlled at chip integration. Please refer to the device overview section to determine the
EE[15:11]
Reset
actual reset state of this register.
EEON
Field
7:3
0
W
R
1
EE15
Internal EEPROM Map Position — These bits determine the upper five bits of the base address for the system’s
internal EEPROM array.
Enable EEPROM — This bit is used to enable the EEPROM memory in the memory map.
0 Disables the EEPROM from the memory map.
1 Enables the EEPROM in the memory map at the address selected by EE[15:11].
Initialization of Internal EEPROM Position Register (INITEE)
7
Writes to this register take one cycle to go into effect.
Figure 3-5. Initialization of Internal EEPROM Position Register (INITEE)
= Unimplemented or Reserved
EE14
6
Table 3-4. INITEE Field Descriptions
EE13
MC9S12C-Family / MC9S12GC-Family
5
EE12
Rev 01.24
NOTE
4
Description
Chapter 3 Module Mapping Control (MMCV4) Block Description
EE11
3
0
2
0
1
EEON
0
115

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