MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 341

MC9S12C128VFU

Manufacturer Part Number
MC9S12C128VFU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12C128VFU

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/SCI/SPI
Program Memory Type
Flash
Program Memory Size
128KB
Total Internal Ram Size
4KB
# I/os (max)
60
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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10.4.7.6
Interrupts are directly associated with one or more status flags in either the
Receiver Flag Register
(CANTFLG).” Interrupts are pending as long as one of the corresponding flags is set. The flags in
CANRFLG and CANTFLG must be reset within the interrupt handler to handshake the interrupt. The flags
are reset by writing a 1 to the corresponding bit position. A flag cannot be cleared if the respective
condition prevails.
10.4.7.7
The MSCAN can recover from stop or wait via the wake-up interrupt. This interrupt can only occur if the
MSCAN was in sleep mode (SLPRQ = 1 and SLPAK = 1) before entering power down mode, the wake-
up option is enabled (WUPE = 1), and the wake-up interrupt is enabled (WUPIE = 1).
10.5
10.5.1
The procedure to initially start up the MSCAN module out of reset is as follows:
If the configuration of registers which are writable in initialization mode needs to be changed only when
the MSCAN module is in normal mode:
Freescale Semiconductor
1. Assert CANE
2. Write to the configuration registers in initialization mode
3. Clear INITRQ to leave initialization mode and enter normal mode
1. Bring the module into sleep mode by setting SLPRQ and awaiting SLPAK to assert after the CAN
2. Enter initialization mode: assert INITRQ and await INITAK
3. Write to the configuration registers in initialization mode
4. Clear INITRQ to leave initialization mode and continue in normal mode
“MSCAN Receiver Flag Register
Interrupt Enable Register
bus becomes idle.
Initialization/Application Information
MSCAN initialization
Interrupt Acknowledge
Recovery from Stop or Wait
It must be guaranteed that the CPU clears only the bit causing the current
interrupt. For this reason, bit manipulation instructions (BSET) must not be
used to clear interrupt flags. These instructions may cause accidental
clearing of interrupt flags which are set after entering the current interrupt
service routine.
(CANRFLG)” or the
(CANRIER)”).
MC9S12C-Family / MC9S12GC-Family
(CANRFLG)” and
Section 10.3.2.7, “MSCAN Transmitter Flag Register
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
Rev 01.24
NOTE
Section 10.3.2.6, “MSCAN Receiver
Section 10.3.2.5, “MSCAN
341

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